M372F160(8)0DJ(T)0-C
DRAM MODULE
M372F160(8)0DJ(T)0-C EDO Mode
16M x 72 DRAM DIMM with ECC Using 16Mx4, 4K & 8K Refresh, 3.3V
FEATURES
• Part Identification
GENERAL DESCRIPTION
The Samsung M372F160(8)0DJ(T)0-C is
a 16Mx72bits
Part number
PKG
Ref. CBR Ref.
ROR Ref.
Dynamic RAM high density memory module. The Samsung
M372F160(8)0DJ(T)0-C consists of eighteen CMOS
16Mx4bits DRAMs in SOJ/TSOP-II 400mil packages and two
16 bits driver IC in TSSOP package mounted on a 168-pin
glass-epoxy substrate. A 0.1 or 0.22uF decoupling capacitor is
mounted on the printed circuit board for each DRAM. The
M372F160(8)0DJ(T)0-C is a Dual In-line Memory Module and
is intended for mounting into 168 pin edge connector sockets.
M372F1600DJ0-C
SOJ
4K
8K
4K/64ms
M372F1600DT0-C TSOP
M372F1680DJ0-C SOJ
M372F1680DT0-C TSOP
4K/64ms
8K/64ms
• Extended Data Out Mode Operation
• CAS-before-RAS Refresh capability
• RAS-only and Hidden refresh capability
• LVTTL compatible inputs and outputs
• Single 3.3V±0.3V power supply
PERFORMANCE RANGE
Speed
tRAC
50ns
60ns
tCAC
18ns
20ns
tRC
tHPC
20ns
25ns
• JEDEC standard pinout & Buffered PDpin
• Buffered input except RAS and DQ
• PCB : Height(1250mil), double sided component
-C50
84ns
104ns
-C60
PIN CONFIGURATIONS
PIN NAMES
Pin Front Pin Front Pin Front Pin Back Pin Back Pin Back
Pin Names
Function
A0, B0, A1 - A11 Address Input(4K ref.)
A0, B0, A1 - A12 Address Input(8K ref.)
1
2
3
4
5
6
7
8
9
VSS
29 *CAS2 57 DQ22 85
VSS 113 *CAS3 141 DQ58
DQ0 30 RAS0 58 DQ23 86 DQ36 114 *RAS1 142 DQ59
DQ1 31
DQ2 32
DQ3 33
OE0 59
VCC
87 DQ37 115 RFU 143 VCC
DQ0 - DQ71
W0, W2
OE0, OE2
RAS0, RAS2
CAS0, CAS4
VCC
Data In/Out
VSS
A0
A2
60 DQ24 88 DQ38 116 VSS 144 DQ60
61 RFU 89 DQ39 117
62 RFU 90 VCC 118
Read/Write Enable
Output Enable
A1
A3
A5
A7
A9
145 RFU
146 RFU
147 RFU
148 RFU
149 DQ61
VCC
34
DQ4 35
DQ5 36
DQ6 37
A4
A6
A8
63 RFU 91 DQ40 119
64 RFU 92 DQ41 120
65 DQ25 93 DQ42 121
Row Address Strobe
Column Address Strobe
Power(+3.3V)
10 DQ7 38
11 DQ8 39
12
A10
A12
VCC
66 DQ26 94 DQ43 122 A11 150 DQ62
67 DQ27 95 DQ44 123 *A13 151 DQ63
VSS
Ground
VSS
40
68
VSS
96
VSS 124 VCC 152 VSS
NC
No Connection
Presence Detect Enable
Presence Detect
ID bit
13 DQ9 41 RFU 69 DQ28 97 DQ45 125 RFU 153 DQ64
14 DQ10 42 RFU 70 DQ29 98 DQ46 126 B0 154 DQ65
71 DQ30 99 DQ47 127 VSS 155 DQ66
OE2 72 DQ31 100 DQ48 128 RFU 156 DQ67
VCC 101 DQ49 129 *RAS3 157 VCC
46 CAS4 74 DQ32 102 VCC 130 *CAS5 158 DQ68
19 DQ14 47 *CAS6 75 DQ33 103 DQ50 131 *CAS7 159 DQ69
PDE
15 DQ11 43
16 DQ12 44
VSS
PD1 - 8
ID0 - 1
17 DQ13 45 RAS2 73
18
RSVD
Reserved Use
VCC
RFU
Reserved for Future Use
20 DQ15 48
21 DQ16 49
W2
VCC
76 DQ34 104 DQ51 132 PDE 160 DQ70
77 DQ35 105 DQ52 133 VCC 161 DQ71
Pins marked ¢*¢ are not used in this module.
PD & ID Table
22 DQ17 50 RSVD 78
23 51 RSVD 79
VSS 106 DQ53 134 RSVD 162 VSS
PD1 107 VSS 135 RSVD 163 PD2
PD3 108 RSVD 136 DQ54 164 PD4
PD5 109 RSVD 137 DQ55 165 PD6
PD7 110 VCC 138 VSS 166 PD8
ID0 111 RFU 139 DQ56 167 ID1
VCC 112 *CAS1 140 DQ57 168 VCC
Pin
50NS
60NS
VSS
24 RSVD 52 DQ18 80
25 RSVD 53 DQ19 81
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
1
1
1
1
1
0
0
0
1
1
1
1
1
1
1
0
26
27
VCC
W0
54
VSS
82
55 DQ20 83
28 CAS0 56 DQ21 84
NOTE : A12 is used for only M372F1680DJ0/DT0-C (8K Ref.)
ID0
ID1
0
0
0
0
PD Note :PD & ID Terminals must each be pulled up through a register to VCC at the next higher
level assembly. PDs will be either open (NC) or driven to VSS via on-board buffer circuits.
ID Note : IDs will be either open (NC) or connected directly to VSS without a buffer.
PD : 0 for Vol of Drive IC & 1 for N.C
ID : 0 for Vss & 1 for N.C
REV. 0.1 Oct. 2000