M29F002T, M29F002NT, M29F002B
Table 2. Absolute Maximum Ratings (1)
Symbol
TA
Parameter
Value
–40 to 125
–50 to 125
–65 to 150
–0.6 to 7
Unit
°C
°C
°C
V
Ambient Operating Temperature (3)
Temperature Under Bias
Storage Temperature
TBIAS
TSTG
(2)
VIO
Input or Output Voltages
Supply Voltage
VCC
–0.6 to 7
V
(2)
V(A9, E, G, RPNC)
A9, E, G, RPNC Voltage
–0.6 to 13.5
V
Notes: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”AbsoluteMaximum Ratings”
may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum
Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other
relevant quality documents.
2. Minimum Voltagemay undershoot to –2V during transitionand for less than 20ns.
3. Depends on range.
Organisation
from or program to any block not being ersased,
and then resumed.Block protection providesaddi-
tional data security. Each block can be separately
protectedor unprotectedagainstProgramor Erase
on programming equipment. All previously pro-
tectedblockscan be temporarilyunprotectedin the
application.
The M29F002 is organised as 256K x 8. Memory
control is provided by Chip Enable E, Output En-
able G and Write Enable W inputs.
A Reset/Block Temporary Unprotection RPNC
(NOTavailable on M29F002NT) tri-level input pro-
videsa hardwareresetwhenpulledLow,andwhen
held High (at VID) temporarily unprotects blocks
previously protected allowing them to be progra-
med and erased. Erase and Program operations
are controlled by an internal Program/Erase Con-
troller(P/E.C.).StatusRegisterdataoutputon DQ7
provides a Data Pollingsignal, and DQ6 and DQ2
provide Toggle signals to indicate the state of the
P/E.C operations.
Bus Operations
The following operations can be performed using
theappropriatebus cycles:Read(Array, Electronic
Signature, Block Protection Status), Write com-
mand, Output Disable, Standby,Reset, Block Pro-
tection, Unprotection, Protection Verify,
Unprotection Verify and Block Temporary Unpro-
tection. See Tables4 and 5.
Memory Blocks
Command Interface
The devices feature asymmetricallyblocked archi-
tecture providing system memory integration. The
M29F002has an arrayof 7blocks, one Boot Block
of 16 KBytes, two Parameter Blocks of 8 KBytes,
oneMainBlockof 32KBytesandthreeMainBlocks
of 64 KBytes.
Instructions, made up of commands written in cy-
cles, can be given to the Program/EraseController
through a Command Interface (C.I.). For added
data protection,program or erase execution starts
after4 or6 cycles.The first,second,fourthand fifth
cycles are used to input Coded cycles to the C.I.
This Coded sequence is the same for all Pro-
gram/Erase Controller instructions. The ’Com-
mand’ itself and its confirmation, when applicable,
are given on the third, fourth or sixth cycles. Any
incorrect command or any improper command se-
quencewill reset the device to Read Array mode.
Thememory map is shownin Figure3. Eachblock
can be erased separately, any combination of
blockscan be specifiedfor multi-blockerase or the
entire chip may be erased. The Erase operations
aremanagedautomaticallybythe P/E.C.Theblock
eraseoperationcan be suspendedin orderto read
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