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M24C01-RBN3P PDF预览

M24C01-RBN3P

更新时间: 2024-02-04 08:47:18
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 存储内存集成电路光电二极管双倍数据速率可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
25页 451K
描述
16Kbit, 8Kbit, 4Kbit, 2Kbit and 1Kbit Serial I2C Bus EEPROM

M24C01-RBN3P 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:PLASTIC, DIP-8
针数:8Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.75最大时钟频率 (fCLK):0.4 MHz
JESD-30 代码:R-PDIP-T8JESD-609代码:e0
长度:9.27 mm内存密度:1024 bit
内存集成电路类型:EEPROM内存宽度:8
功能数量:1端子数量:8
字数:128 words字数代码:128
工作模式:SYNCHRONOUS最高工作温度:125 °C
最低工作温度:-40 °C组织:128X8
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:SERIAL峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:5.33 mm
串行总线类型:I2C最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):1.8 V标称供电电压 (Vsup):2.5 V
表面贴装:NO技术:CMOS
温度等级:AUTOMOTIVE端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mm最长写入周期时间 (tWC):10 ms

M24C01-RBN3P 数据手册

 浏览型号M24C01-RBN3P的Datasheet PDF文件第4页浏览型号M24C01-RBN3P的Datasheet PDF文件第5页浏览型号M24C01-RBN3P的Datasheet PDF文件第6页浏览型号M24C01-RBN3P的Datasheet PDF文件第8页浏览型号M24C01-RBN3P的Datasheet PDF文件第9页浏览型号M24C01-RBN3P的Datasheet PDF文件第10页 
M24C16, M24C08, M24C04, M24C02, M24C01  
Figure 7. Write Mode Sequences with WC=1 (data write inhibited)  
WC  
ACK  
ACK  
NO ACK  
DATA IN  
Byte Write  
DEV SEL  
BYTE ADDR  
R/W  
WC  
ACK  
ACK  
NO ACK  
NO ACK  
DATA IN 3  
Page Write  
DEV SEL  
BYTE ADDR  
DATA IN 1 DATA IN 2  
R/W  
WC (cont'd)  
NO ACK  
NO ACK  
Page Write  
(cont'd)  
DATA IN N  
AI02803C  
Write Operations  
the Start condition until the end of the address  
byte), the device replies to the data byte with  
NoAck, as shown in Figure 7., and the location is  
not modified. If, instead, the addressed location is  
not Write-protected, the device replies with Ack.  
The bus master terminates the transfer by gener-  
ating a Stop condition, as shown in Figure 8..  
Following a Start condition the bus master sends  
a Device Select Code with the Read/Write bit  
(RW) reset to 0. The device acknowledges this, as  
shown in Figure 8., and waits for an address byte.  
The device responds to the address byte with an  
acknowledge bit, and then waits for the data byte.  
Page Write  
When the bus master generates a Stop condition  
immediately after the Ack bit (in the “10 bit” time  
th  
The Page Write mode allows up to 16 bytes to be  
written in a single Write cycle, provided that they  
are all located in the same page in the memory:  
that is, the most significant memory address bits  
are the same. If more bytes are sent than will fit up  
to the end of the page, a condition known as ‘roll-  
over’ occurs. This should be avoided, as data  
starts to become overwritten in an implementation  
dependent way.  
The bus master sends from 1 to 16 bytes of data,  
each of which is acknowledged by the device if  
Write Control (WC) is Low. If the addressed loca-  
tion is Write-protected, by Write Control (WC) be-  
ing driven High (during the period from the Start  
slot), either at the end of a Byte Write or a Page  
Write, the internal Write cycle is triggered. A Stop  
condition at any other time slot does not trigger the  
internal Write cycle.  
During the internal Write cycle, Serial Data (SDA)  
and Serial Clock (SCL) are ignored, and the de-  
vice does not respond to any requests.  
Byte Write  
After the Device Select code and the address byte,  
the bus master sends one data byte. If the ad-  
dressed location is Write-protected, by Write Con-  
trol (WC) being driven High (during the period from  
7/25  

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