Datasheet > LY6225616MV

LY6225616MV

更新时间： 2022-12-29 00:04:54

品牌	Logo	应用领域
台湾来扬 - LYONTEK		静态存储器
页数	文件大小	规格书
14页	175K
描述
256K X 16 BIT LOW POWER CMOS SRAM

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LY6225616MV 数据手册

LY6225616

256K X 16 BIT LOW POWER CMOS SRAM

Rev. 1.3

CAPACITANCE (TA = 25℃, f = 1.0MHz)

PARAMETER

Input Capacitance

Input/Output Capacitance

SYMBOL

MIN.

MAX

UNIT

C_IN

C_I/O

Note : These parameters are guaranteed by device characterization, but not production tested.

AC TEST CONDITIONS

Input Pulse Levels

0.2V to V_CC- 0.2V

Input Rise and Fall Times

Input and Output Timing Reference Levels

Output Load

3ns

1.5V

C_L= 30pF + 1TTL, I_OH/I_OL= -2mA/4mA

AC ELECTRICAL CHARACTERISTICS

(1) READ CYCLE

PARAMETER

SYM.

t_RC

UNIT

LY6225616-45

LY6225616-55

LY6225616-70

MIN.

MAX.

MIN.

MAX.

MIN.

MAX.

Read Cycle Time

Address Access Time

Chip Enable Access Time

Output Enable Access Time

Chip Enable to Output in Low-Z

Output Enable to Output in Low-Z t_OLZ

Chip Disable to Output in High-Z t_CHZ

Output Disable to Output in High-Z t_OHZ

Output Hold from Address Change t_OH

t_AA

t_ACE

t_OE

t_CLZ

LB#, UB# Access Time

LB#, UB# to High-Z Output

LB#, UB# to Low-Z Output

t_BA

t_BHZ

t_BLZ

(2) WRITE CYCLE

PARAMETER

SYM.

t_WC

t_AW

t_CW

t_AS

t_WP

t_WR

t_DW

UNIT

LY6225616-45

LY6225616-55

LY6225616-70

MIN.

MAX.

MIN.

MAX.

MIN.

MAX.

Write Cycle Time

Address Valid to End of Write

Chip Enable to End of Write

Address Set-up Time

Write Pulse Width

Write Recovery Time

Data to Write Time Overlap

Data Hold from End of Write Time t_DH

Output Active from End of Write

Write to Output in High-Z

t_OW

t_WHZ

t_BW

LB#, UB# Valid to End of Write

*These parameters are guaranteed by device characterization, but not production tested.

Lyontek Inc. ^{reserves the rights to change the specifications and products without notice.}

5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.

TEL: 886-3-6668838

FAX: 886-3-6668836

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