Datasheet > LVC16823AU

LVC16823AU

更新时间： 2023-05-15 00:00:00

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
6页	85K
描述
WAFER-0, Wafer

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LVC16823AU 数据手册

IDT74LVC16823A

3.3VCMOS18-BITREGISTERWITH3-STATEOUTPUTS

INDUSTRIALTEMPERATURERANGE

IDT74LVC16823A

3.3V CMOS

18-BIT REGISTER

WITH 3-STATE OUTPUTS

AND 5 VOLT TOLERANT I/O

DESCRIPTION:

FEATURES:

TheLVC16823A18-bit registerisbuiltusingadvanceddualmetalCMOS

technology.This high-speed,low-powerregisteris idealforuseas abuffer

registerfordatasynchronizationandstorage.TheOutputEnable(OE)and

clock (CLK) controls are organized to operate each device as two 9-bit

registers orone 18-bitregisterwithcommonclock.Flow-throughorgani-

zationofsignalpinssimplifieslayout. Allinputsaredesignedwithhysteresis

forimprovednoise margin.

• Typical tSK(o) (Output Skew) < 250ps

• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using

machine model (C = 200pF, R = 0)

• VCC = 3.3V ± 0.3V, Normal Range

• VCC = 2.7V to 3.6V, Extended Range

• CMOS power levels (0.4μ W typ. static)

• All inputs, outputs, and I/O are 5V tolerant

• Supports hot insertion

Allpins oftheLVC16823Acanbedrivenfromeither3.3Vor5Vdevices.

This feature allows the use of this device as a translator in a mixed 3.3V/

5Vsupplysystem.

• Available in SSOP, TSSOP, and TVSOP packages

The LVC16823A has been designed with a ±24mA output driver. The

driver is capable of driving a moderate to heavy load while maintaining

speedperformance.

DRIVE FEATURES:

• High Output Drivers: ±24mA

• Reduced system switching noise

APPLICATIONS:

• 5V and 3.3V mixed voltage systems

• Data communication and telecommunication systems

FUNCTIONALBLOCKDIAGRAM

1OE

2OE

1CLR

2CLR

CLK

CLKEN

2Q1

2D1

TO EIGHT OTHER CHANNELS

TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.

INDUSTRIAL TEMPERATURE RANGE

MARCH 2006

DSC-4573/5

12 3 4 5 6

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