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LTC6417CUDC#PBF PDF预览

LTC6417CUDC#PBF

更新时间： 2024-09-30 20:11:35
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凌特 - Linear /
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LTC6417CUDC#PBF 数据手册

 浏览型号LTC6417CUDC#PBF的Datasheet PDF文件第2页浏览型号LTC6417CUDC#PBF的Datasheet PDF文件第3页浏览型号LTC6417CUDC#PBF的Datasheet PDF文件第4页浏览型号LTC6417CUDC#PBF的Datasheet PDF文件第5页浏览型号LTC6417CUDC#PBF的Datasheet PDF文件第6页浏览型号LTC6417CUDC#PBF的Datasheet PDF文件第7页 
LTC6417  
1.6GHz Low Noise High Linearity  
Differential Buffer/16-Bit ADC  
Driver with Fast Clamp  
DescripTion  
FeaTures  
The LTC®6417 is a differential unity gain buffer that can  
drive a 50Ω load with extremely low noise and excellent  
linearity. It is well suited for driving high speed 14- and  
16-bit pipeline ADCs with input signals from DC to beyond  
600MHz. Differentialinputimpedanceis18.5kΩ, allowing  
1:4 and 1:8 transformers to be used at the input providing  
additional system gain in 50Ω systems.  
n
1.6GHz –3dB Small Signal Bandwidth  
n
Low Distortion Driving 50Ω Load, 2.4V Out  
P-P  
–100dBc/–69dBc HD2/HD3 at 140MHz  
–80dBc IM3 and 46dBm OIP3 at 140MHz  
–100dBc/–66dBc HD2/HD3 at 380MHz  
–68dBc IM3 and 39dBm OIP3 at 380MHz  
1.5nV/√Hz Output Noise  
n
n
n
4.3pA/√Hz Input Current Noise  
With no external biasing or gain setting components and  
a flow-through pinout, the LTC6417 is very easy to use. It  
can be DC-coupled and has a common mode output offset  
of –60mV. The LTC6417 input pins are internally biased to  
provide an output common mode voltage that is set by  
Programmable High Speed, Fast Recovery  
Output Clamping  
n
4.28V Maximum Output Swing on a 50Ω  
P-P  
Differential Load  
DC-Coupled Signal Path  
n
n
n
the voltage on the V pin for AC-coupled applications.  
CM  
Operates on Single 4.75V to 5.25V Supply  
Power: 615mW on 5V, Can Be Reduced to 370mW,  
Shutdown Mode 120mW  
Supplycurrentistypically123mAandtheLTC6417operates  
on supply voltages ranging from 4.75V to 5.25V. Power  
consumption can be reduced to 74mA via the PWRADJ  
pin. The LTC6417 also has a hardware shutdown feature  
which reduces current consumption to 24mA.  
n
3mm × 4mm 20-Lead QFN Package  
TheLTC6417featuresfast,adjustableoutputvoltageclamp-  
ing to help protect subsequent circuitry. The CLHI pin sets  
the maximum swing, while a symmetric minimum swing  
applicaTions  
n
Differential ADC Driver  
n
CCD Buffer  
is set up internally. LTC6417 V pin will signal overrange  
OR  
n
Cable Driver  
when the clamps limit output voltage.  
n
50Ω Buffer  
The LTC6417 is packaged in a 20-lead 3mm × 4mm QFN  
package.Pinoutisoptimizedforplacementdirectlyadjacent  
to Linear Technology’s high speed 14- and 16-bit ADCs.  
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear  
Technology Corporation. All other trademarks are the property of their respective owners.  
LTC6417 Driving LTC2209  
16-Bit ADC 32K Point FFT,  
Typical applicaTion  
LTC6417 Driving an LTC2209 16-Bit ADC at 140MHz IF  
fIN = 140MHz, –1dBFS, PGA = 0  
3.3V  
5V  
0
HD2 = –88dBc  
HD3 = –94dBc  
SFDR = 88dBc  
SNR = 75.4dB  
SEE FIGURE 1/TABLE 1  
1:4 BALUN  
C43  
E1  
C45  
–10  
–20  
E3  
2.2µF  
27pF  
18pF  
680pF  
0.1µF  
1,6,  
11,16  
51nH  
75nH  
–30  
R36  
60.4Ω  
R42  
300Ω  
–40  
T1  
+
5
10Ω  
10Ω  
V
f
= 153.6Msps  
–50  
S
WBC4-14LB  
2
PWRADJ  
DEMO BOARD DC1685A  
–60  
8
9
4
3
C40  
+
CLHI  
+
–
19  
R53  
120Ω  
C41  
12pF  
IN  
100Ω  
100Ω  
A
A
IN  
IN  
12pF  
–70  
+
E5  
51nH  
16  
OUT  
OUT  
2
50Ω  
LTC2209  
PGA = 0  
LTC6417  
–
–80  
–
R12  
60.4Ω  
C10  
12pF  
R43  
300Ω  
•
•
V
–90  
IN  
OR  
18  
+
V
CM  
6
1
–
V
CM  
14  
1k  
SHDN  
–100  
–110  
–120  
15  
GND  
0.01µF  
C44  
27pF  
C46  
18pF  
12  
E2  
51nH  
E3  
75nH  
0.01µF  
CLOCK  
(153.6MHz)  
3,7,10,  
17, 20,21  
0
10 20 30 40 50 60 70 80  
FREQUENCY (MHz)  
6417 TA01b  
6417 TA01a  
2.2µF  
6417f  
1
1234567...32

中文翻译

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LTC6417CUDC#PBF 替代型号

型号 品牌 替代类型 描述 数据表
LTC6417CUDC#TRPBF Linear

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