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LTC2619IGN-1TRPBF PDF预览

LTC2619IGN-1TRPBF

更新时间： 2024-09-25 05:43:47
品牌 Logo 应用领域
凌特 - Linear /
页数 文件大小 规格书
22页 246K
描述
Quad 16-/14-/12-Bit Rail-to-Rail DACs with I2C Interface

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LTC2619IGN-1TRPBF 数据手册

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LTC2609/LTC2619/LTC2629  
Quad 16-/14-/12-Bit  
Rail-to-Rail DACs with  
2
I C Interface  
FEATURES  
DESCRIPTION  
TheLTC®2609/LTC2619/LTC2629arequad16-,14-and12-  
bit,2.7Vto5.5Vrail-to-railvoltageoutputDACsina16-lead  
SSOPpackage.Theyhavebuilt-inhighperformanceoutput  
buffers and are guaranteed monotonic.  
n
Smallest Pin-Compatible Quad DACs:  
LTC2609: 16 Bits  
LTC2619: 14 Bits  
LTC2629: 12 Bits  
n
Guaranteed Monotonic Over Temperature  
These parts establish new board-density benchmarks for  
16- and 14-bit DACs and advance performance standards  
for output drive and load regulation in single-supply, volt-  
age-output DACs.  
n
Separate Reference Inputs  
n
27 Selectable Addresses  
2
n
™
400kHz I C Interface  
n
n
n
n
n
n
Wide 2.7V to 5.5V Supply Range  
2
Thepartsusea2-wire, I Ccompatibleserialinterface. The  
Low Power Operation: 250μA per DAC at 3V  
Individual Channel Power Down to 1μA (Max)  
High Rail-to-Rail Output Drive ( 15mA, Min)  
Ultralow Crosstalk Between DACs (5μV)  
LTC2609/LTC2619/LTC2629: Power-On Reset to  
Zero-Scale  
LTC2609/LTC2619/LTC2629 operate in both the standard  
mode (clock rate of 100kHz) and the fast mode (clock  
rate of 400kHz).  
The LTC2609/LTC2619/LTC2629 incorporate a power-on  
resetcircuit.Duringpower-up,thevoltageoutputsriseless  
than 10mV above zero-scale; after power-up, they stay at  
zero-scale until a valid write and update take place. The  
power-on reset circuit resets the LTC2609-1/LTC2619-1/  
LTC2629-1 to mid-scale. The voltage outputs stay at mid-  
scale until a valid write and update take place.  
n
n
LTC2609-1/LTC2619-1/LTC2629-1: Power-On Reset  
to Mid-Scale  
Tiny 16-Lead Narrow SSOP Package  
APPLICATIONS  
n
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear  
Technology Corporation. All other trademarks are the property of their respective owners.  
Protected by U.S. Patents including 5396245. Patent pending.  
Mobile Communications  
n
Process Control and Industrial Automation  
n
Automatic Test Equipment and Instrumentation  
BLOCK DIAGRAM  
V
REFLO  
GND  
1
CC  
2
16  
REFA  
3
4
15 REFD  
Differential Nonlinearity  
DAC A  
DAC B  
DAC D  
DAC C  
V
14  
V
OUTD  
OUTA  
(LTC2609)  
1.0  
0.8  
V
V
= 5V  
REF  
CC  
= 4.096V  
V
OUTB  
5
6
13  
V
OUTC  
0.6  
0.4  
REFB  
12 REFC  
0.2  
CONTROL  
LOGIC  
0
–0.2  
–0.4  
–0.6  
–0.8  
–1.0  
32-BIT SHIFT REGISTER  
11 CA0  
10 CA1  
8
9
SCL  
SDA  
ADDRESS  
DECODE  
LOGIC  
2
I C  
0
16384  
32768  
CODE  
49152  
65535  
INTERFACE  
2609 G02  
7
CA2  
2609 BD  
26091929fa  
1
1234567...22

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