Electrical SpecificatiLonTsCSub2je1ct7to5C-h1a4ng/e
LTC2174-14/LTC2173-14
14-Bit, 125Msps/105Msps/
80Msps Low Power Quad ADCs
FEATURES
DESCRIPTION
The LTC®2175-14/2174-14/2173-14 are 4-channel, simul-
taneous sampling 14-bit A/D converters designed for
digitizing high frequency, wide dynamic range signals.
They are perfect for demanding communications applica-
tions with AC performance that includes 73.4dB SNR and
88dB spurious free dynamic range (SFDR). Ultralow jitter
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4-Channel Simultaneous Sampling ADC
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73.4dB SNR
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88dB SFDR
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Low Power: 558mW/450mW/376mW
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Single 1.8V Supply
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Serial LVDS Outputs: 1 or 2 Bits per Channel
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of 0.15ps
allows undersampling of IF frequencies with
Selectable Input Ranges: 1V to 2V
RMS
P-P
P-P
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excellent noise performance.
800MHz Full Power Bandwidth S/H
Shutdown and Nap Modes
DC specs include 1LSB INL (typ), 0.3LSB DNL (typ) and
no missing codes over temperature. The transition noise
Serial SPI Port for Configuration
Pin Compatible 14-Bit and 12-Bit Versions
52-Pin (7mm × 8mm) QFN Package
is a low 1.2 LSB
.
RMS
The digital outputs are serial LVDS to minimize the num-
ber of data lines. Each channel outputs two bits at a time
(2-lane mode). At lower sampling rates there is a one bit
per channel option (1-lane mode). The LVDS drivers have
optional internal termination and adjustable output levels
to ensure clean signal integrity.
APPLICATIONS
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Communications
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Cellular Base Stations
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Software Defined Radios
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Portable Medical Imaging
+
–
The ENC and ENC inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL, or
CMOS inputs. An internal clock duty cycle stabilizer al-
lows high performance at full speed for a wide range of
clock duty cycles.
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Multichannel Data Acquisition
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Nondestructive Testing
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
1.8V
V
1.8V
OV
LTC2175-14, 125Msps,
2-Tone FFT, fIN = 70MHz and 75MHz
DD
DD
CHANNEL 1
ANALOG
INPUT
0
–10
–20
–30
–40
–50
14-BIT
OUT1A
OUT1B
S/H
S/H
S/H
S/H
ADC CORE
CHANNEL 2
ANALOG
INPUT
OUT2A
OUT2B
14-BIT
ADC CORE
DATA
SERIALIZER
SERIALIZED
CHANNEL 3
ANALOG
INPUT
OUT3A
OUT3B
–60
14-BIT
ADC CORE
LVDS
–70
OUTPUTS
–80
–90
–100
–110
–120
CHANNEL 4
ANALOG
INPUT
OUT4A
OUT4B
14-BIT
ADC CORE
DATA
CLOCK
OUT
ENCODE
INPUT
0
20
30
40
50
60
10
PLL
FREQUENCY (MHz)
FRAME
217514 TA01b
GND
OGND
217514 TA01
21754314p
1