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LTC2173-14 PDF预览

LTC2173-14

更新时间: 2023-12-20 18:44:11
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
34页 852K
描述
14 位、80Msps 低功率四通道 ADC

LTC2173-14 数据手册

 浏览型号LTC2173-14的Datasheet PDF文件第1页浏览型号LTC2173-14的Datasheet PDF文件第2页浏览型号LTC2173-14的Datasheet PDF文件第4页浏览型号LTC2173-14的Datasheet PDF文件第5页浏览型号LTC2173-14的Datasheet PDF文件第6页浏览型号LTC2173-14的Datasheet PDF文件第7页 
LTC2175-14/  
LTC2174-14/LTC2173-14  
converTer characTerisTics The l denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. (Note 5)  
LTC2175-14  
TYP  
LTC2174-14  
TYP  
LTC2173-14  
TYP MAX  
PARAMETER  
CONDITIONS  
MIN  
14  
MAX  
MIN  
MAX  
MIN  
UNITS  
Bits  
l
l
l
l
Resolution (No Missing Codes)  
Integral Linearity Error  
Differential Linearity Error  
Offset Error  
14  
14  
Differential Analog Input (Note 6)  
Differential Analog Input  
(Note 7)  
–4.1  
–0.9  
–12  
1.2  
0.3  
3
4.1  
0.9  
12  
–3.25  
–0.8  
–12  
1
0.3  
3
3.25 –2.75  
1
0.3  
3
2.75  
0.8  
12  
LSB  
LSB  
mV  
0.8  
12  
–0.8  
–12  
Gain Error  
Internal Reference  
External Reference  
–1.3  
–1.3  
–1.3  
–1.3  
–1.3  
–1.3  
%FS  
%FS  
l
–2.6  
0
–2.6  
0
–2.6  
0
Offset Drift  
20  
20  
20  
µV/°C  
Full-Scale Drift  
Internal Reference  
External Reference  
35  
25  
35  
25  
35  
25  
ppm/°C  
ppm/°C  
Gain Matching  
Offset Matching  
Transition Noise  
External Reference  
0.2  
3
0.2  
3
0.2  
3
%FS  
mV  
External Reference  
1.2  
1.2  
1.2  
LSB  
RMS  
analog inpuT The l denotes the specifications which apply over the full operating temperature range, otherwise  
specifications are at TA = 25°C. (Note 5)  
SYMBOL PARAMETER  
CONDITIONS  
1.7V < V < 1.9V  
MIN  
TYP  
MAX  
UNITS  
+
l
l
l
V
V
V
Analog Input Range (A – A  
)
+
1 to 2  
V
P-P  
IN  
IN  
IN  
DD  
Analog Input Common Mode (A + A )/2 Differential Analog Input (Note 8)  
V
CM  
– 100mV  
0.625  
V
CM  
V
CM  
+ 100mV  
1.300  
V
IN(CM)  
SENSE  
INCM  
IN  
IN  
External Voltage Reference Applied to SENSE External Reference Mode  
1.250  
V
I
Analog Input Common Mode Current  
Per Pin, 125Msps  
Per Pin, 105Msps  
Per Pin, 80Msps  
155  
130  
100  
µA  
µA  
µA  
+
l
l
l
I
I
I
t
t
Analog Input Leakage Current No Encode  
PAR/SER Input Leakage Current  
0 < A , A < V  
,
DD  
–1  
–3  
–6  
1
3
6
µA  
µA  
µA  
ns  
IN1  
IN  
IN  
0 < PAR/SER < V  
IN2  
DD  
SENSE Input Leakage Current  
0.625 < SENSE < 1.3V  
IN3  
Sample-and-Hold Acquisition Delay Time  
Sample-and-Hold Acquisition Delay Jitter  
Analog Input Common Mode Rejection Ratio  
Full-Power Bandwidth  
0
AP  
0.15  
80  
ps  
RMS  
JITTER  
CMRR  
BW-3B  
dB  
Figure 6 Test Circuit  
800  
MHz  
21754314fa  
3

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