LTC1852/LTC1853
8-Channel, 10-Bit/12-Bit,
400ksps, Low Power, Sampling ADCs
FEATURES
DESCRIPTION
The 10-bit LTC®1852 and 12-bit LTC1853 are complete
8-channeldataacquisitionsystems.Theyincludeaflexible
8-channel multiplexer, a 400ksps successive approxima-
tionanalog-to-digitalconverter,aninternalreferenceanda
paralleloutputinterface.Themultiplexercanbeconfigured
forsingle-endedordifferentialinputs,twogainrangesand
unipolar or bipolar operation. The ADCs have a scan mode
thatwillrepeatedlycyclethroughall8multiplexerchannels
and can also be programmed to sequence through up to
16 addresses and configurations. The sequence can also
be read back from internal memory.
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Flexible 8-Channel Multiplexer
Single-Ended or Differential Inputs
Two Gain Ranges
Unipolar or Bipolar Operation
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Scan Mode and Programmable Sequencer
Eliminate Configuration Software Overhead
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Low Power: 3mW at 250ksps
2.7V to 5.5V Supply Range
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Internal or External Reference Operation
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Parallel Output Includes MUX Address
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Nap and Sleep Shutdown Modes
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Pin Compatible up-grade 1.25Msps 10-Bit LTC1850
and 12-Bit LTC1851
The reference and buffer amplifier provide pin strappable
ranges of 4.096V, 2.5V and 2.048V. The parallel output
includes the 10-bit or 12-bit conversion result plus the
4-bit multiplexer address. The digital outputs are pow-
ered from a separate supply allowing for easy interface
to 3V digital logic. Typical power consumption is 10mW
at 400ksps from a single 5V supply and 3mW at 250ksps
from a single 3V supply.
APPLICATIONS
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High Speed Data Acquisition
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Test and Measurement
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Imaging Systems
Telecommunications
Industrial Process Control
Spectrum Analysis
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, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
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BLOCK DIAGRAM
LTC1853
M1
SHDN
CS
CONVST
RD
WR
DIFF
A2
A1
A0
UNI/BIP
PGA
M0
CH0
CH1
Integral Linearity
CONTROL LOGIC
CH2
AND
1.0
0.5
PROGRAMMABLE
SEQUENCER
CH3
CH4
CH5
CH6
CH7
COM
8-CHANNEL
INTERNAL
CLOCK
MULTIPLEXER
OV
DD
BUSY
DIFF /S6
0
OUT
A2 /S5
OUT
A1 /S4
OUT
A0 /S3
OUT
D11/S2
D10/S1
D9/S0
D8
–0.5
–1.0
2.5V
REFERENCE
12-BIT
SAMPLING
ADC
+
–
DATA
LATCHES
REFOUT
OUTPUT
DRIVERS
D7
D6
D5
D4
0
512 1024 1536 2048 2560 3072 3584 4096
D3
REFIN
REF AMP
CODE
D2
1852 F01
D1
D0
REFCOMP
OGND
18523 BD
18523fa
1