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LTC1589 PDF预览

LTC1589

更新时间: 2023-12-20 18:44:06
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
16页 276K
描述
具可编程输出范围的14位SoftSpan DAC

LTC1589 数据手册

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LTC1588/LTC1589/LTC1592  
The denotes specifications which apply over the full operating  
ELECTRICAL CHARACTERISTICS  
temperature range, otherwise specifications are TA = TMIN to TMAX, VCC = 5V, VREF = 5V, IOUT2 = AGND = GND = 0V.  
SYMBOL PARAMETER  
Reference Input  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
R
DAC Input Resistance (Unipolar)  
(Note 6)  
5
7
10  
20  
kΩ  
kΩ  
REF  
R1, R2 R1, R2 Resistance  
(Notes 6, 11)  
10  
14  
R
R
Offset Resistance (Bipolar)  
±5V, ±10V, ±2.5V Ranges  
–2.5V to 7.5V Range  
10  
20  
14  
28  
20  
40  
kΩ  
kΩ  
OFS  
Feedback Resistance (Unipolar)  
Feedback Resistance (Bipolar)  
5V Range  
10V Range  
5
10  
7
14  
10  
20  
kΩ  
kΩ  
FB  
±5V and –2.5V to 7.5V Ranges  
±10V Range  
±2.5V Range  
10  
20  
5
14  
28  
7
20  
40  
10  
kΩ  
kΩ  
kΩ  
Analog Outputs (Note 4)  
Output Capacitance (I  
C
)
OUT1  
DAC Load All 1s  
DAC Load All 0s  
160  
100  
pF  
pF  
OUT  
AC Performance (Note 4)  
Settling Time  
5V Range, 0V to 5V Step with LT1468 (Note 7)  
(Note 10)  
2
2
µs  
Midscale Glitch Impulse  
nV-s  
Multiplying Feedthrough Error  
Total Harmonic Distortion  
Output Noise Voltage Density  
V
= ±10V, 10kHz Sine Wave  
1
mV  
P-P  
REF  
THD  
(Note 8) Multiplying  
(Note 9) At I  
108  
11  
dB  
nV/Hz  
OUT1  
Digital Inputs  
V
V
Digital Input High Voltage  
Digital Input Low Voltage  
Digital Input Current  
2.4  
V
V
IH  
IL  
0.8  
±1  
8
I
µA  
pF  
IN  
C
Digital Input Capacitance  
V
= 0V (Note 4)  
IN  
IN  
Digital Outputs  
V
V
Digital Output High Voltage  
Digital Output Low Voltage  
I
I
= 200µA  
4
V
V
OH  
OL  
OH  
OL  
= 1.6mA  
0.4  
Timing Characteristics  
t
t
t
t
t
t
t
t
t
t
t
Serial Input Valid to SCK Setup Time  
Serial Input Valid to SCK Hold Time  
SCK Pulse Width High  
60  
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
1
2
35  
35  
360  
35  
0
3
SCK Pulse Width Low  
4
CS/LD Pulse High Width  
LSB SCK High to CS/LD High  
CS/LD Low to SCK High  
5
6
7
SCK to SDO Propagation Delay  
SCK Low to CS/LD Low  
C
= 50pF  
LOAD  
20  
35  
100  
35  
180  
8
9
Clear Pulse Low Width  
10  
11  
CS/LD High to SCK Positive Edge  
SCK Frequency  
Non-Daisy Chain (Note 12)  
Daisy Chain (Note 13)  
14.2  
4.1  
MHz  
MHz  
1588992fa  
3

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