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LTBGW PDF预览

LTBGW

更新时间: 2024-11-24 05:43:39
品牌 Logo 应用领域
凌特 - Linear /
页数 文件大小 规格书
24页 515K
描述
Serial 12-Bit/14-Bit, 3Msps Simultaneous Sampling ADCs with Shutdown

LTBGW 数据手册

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LTC1407-1/LTC1407A-1  
Serial 12-Bit/14-Bit, 3Msps  
Simultaneous Sampling  
ADCs with Shutdown  
U
FEATURES  
DESCRIPTIO  
The LTC®1407-1/LTC1407A-1 are 12-bit/14-bit, 3Msps  
ADCswithtwo1.5Mspssimultaneouslysampleddifferen-  
tial inputs. The devices draw only 4.7mA from a single 3V  
supply and come in a tiny 10-lead MS package. A Sleep  
shutdown feature lowers power consumption to 10µW.  
The combination of speed, low power and tiny package  
makestheLTC1407-1/LTC1407A-1suitableforhighspeed,  
portable applications.  
3Msps Sampling ADC with Two Simultaneous  
Differential Inputs  
1.5Msps Throughput per Channel  
Low Power Dissipation: 14mW (Typ)  
3V Single Supply Operation  
±1.25V Differential Input Range  
Pin Compatible 0V to 2.5V Input Range Version  
(LTC1407/LTC1407A)  
2.5V Internal Bandgap Reference with External  
The LTC1407-1/LTC1407A-1 contain two separate differ-  
entialinputsthataresampledsimultaneouslyontherising  
edge of the CONV signal. These two sampled inputs are  
then converted at a rate of 1.5Msps per channel.  
Overdrive  
3-Wire Serial Interface  
Sleep (10µW) Shutdown Mode  
Nap (3mW) Shutdown Mode  
The 80dB common mode rejection allows users to elimi-  
nategroundloopsandcommonmodenoisebymeasuring  
signals differentially from the source.  
80dB Common Mode Rejection at 100kHz  
Tiny 10-Lead MS Package  
U
APPLICATIO S  
The devices convert –1.25V to 1.25V bipolar inputs differ-  
entially. The absolute voltage swing for CH0+, CH0, CH1+  
and CH1extends from ground to the supply voltage.  
Telecommunications  
Data Acquisition Systems  
Uninterrupted Power Supplies  
Multiphase Motor Control  
I & Q Demodulation  
Industrial Radio  
The serial interface sends out the two conversion results in  
32 clocks for compatibility with standard serial interfaces.  
, LTC and LT are registered trademarks of Linear Technology Corporation.  
U.S. patent numbers 6084440, 6522187  
W
BLOCK DIAGRA  
10µF 3V  
THD, 2nd and 3rd vs Input  
Frequency for Differential  
Input Signals  
7
V
DD  
LTC1407A-1  
+
–44  
–50  
–56  
–62  
CH0  
1
2
+
S & H  
CH0  
THREE-  
STATE  
SERIAL  
OUTPUT  
PORT  
3Msps  
14-BIT ADC  
MUX  
8
SDO  
–68  
–74  
+
CH1  
CH1  
4
5
3
+
THD 3rd  
S & H  
–80  
–86  
10  
9
CONV  
SCK  
–92  
TIMING  
LOGIC  
V
2nd  
REF  
–98  
10µF  
–104  
GND  
2.5V  
REFERENCE  
6
0.1  
1
10 20  
FREQUENCY (MHz)  
EXPOSED PAD  
11  
14071 G22  
1407A1 BD  
14071f  
1

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