LSU422
HIGH INPUT IMPEDANCE
MONOLITHIC DUAL
N-CHANNEL JFET
Linear Systems replaces discontinued Siliconix U422
The LSU422 is a high input impedance Monolithic Dual N-Channel JFET
FEATURES
The LSU422 monolithic dual n-channel JFET is
HIGH INPUT IMPEDANCE
HIGH GAIN
LOW POWER OPERATION
ABSOLUTE MAXIMUM RATINGS
@ 25°C (unless otherwise noted)
IG = 0.25pA MAX
gfs = 120µmho MIN
VGS(OFF) = 2V MAX
designed
to provide very high input impedance for differential
amplification and impedance matching. Among its
many unique features, this series offers operating gate
current specified at -250 fA. The LSU422 is a direct
replacement for discontinued Siliconix U422.
Maximum Temperatures
Storage Temperature
Operating Junction Temperature
The hermetically sealed TO-71 & TO-78 packages are
well suited for military applications. The 8 Pin P-DIP
and 8 Pin SOIC provide ease of manufacturing, and the
symmetrical pinout prevents improper orientation.
‐65°C to +150°C
+150°C
Maximum Voltage and Current for Each Transistor – Note 1
‐VGSS
‐VDSO
‐IG(f)
Gate Voltage to Drain or Source
Drain to Source Voltage
Gate Forward Current
40V
40V
10mA
(See Packaging Information).
Maximum Power Dissipation
Device Dissipation @ Free Air – Total
LSU422 Applications:
400mW @ +125°C
MATCHING CHARACTERISTICS @ 25°C UNLESS OTHERWISE NOTED
Ultra Low Input Current Differential Amps
High-Speed Comparators
Impedance Converters
SYMBOL
CHARACTERISTICS VALUE UNITS CONDITIONS
|∆V GS1‐2 /∆T|max.
DRIFT VS.
TEMPERATURE
OFFSET VOLTAGE
25
µV/°C
VDG=10V, ID=30µA
TA=‐55°C to +125°C
VDG=10V, ID=30µA
| V GS1‐2 | max.
15
mV
ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
SYMBOL
BVGSS
BVGGO
CHARACTERISTICS
Breakdown Voltage
Gate‐To‐Gate Breakdown
TRANSCONDUCTANCE
Full Conduction
MIN.
40
40
TYP.
60
‐‐
MAX.
‐‐
‐‐
UNITS
V
V
CONDITIONS
VDS = 0 IG =1nA
IG = 1µA ID = 0 IS= 0
YfSS
YfS
300
120
‐‐
200
1500
350
µmho
µmho
VDS = 10V
VDG = 10V
VGS = 0V f = 1kHz
ID = 30µA f = 1kHz
Typical Operation
DRAIN CURRENT
Click To Buy
IDSS
Full Conduction
GATE VOLTAGE
Pinchoff voltage
Operating Range
GATE CURRENT
Operating
60
‐‐
1000
µA
VDS = 10V
VGS = 0V
VGS(off)
VGS
‐‐
‐‐
‐‐
‐‐
2.0
1.8
V
V
VDS = 10V
VDG = 10V
ID = 1nA
ID = 30µA
IGmax.
‐IGmax.
IGSSmax.
‐IGSSmax.
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
.25
250
1.0
1.0
pA
pA
pA
nA
VDG = 10V
ID = 30µA
VGS = 20V
High Temperature
At Full Conduction
High Temperature
OUTPUT CONDUCTANCE
Full Conduction
Operating
TA = +125°C
VDS = 0V
TA = +125°C
YOSS
YOS
‐‐
‐‐
‐‐
0.1
10
3.0
µmho
µmho
VDS = 10V
VGS = 0V
ID = 30µA
VDG = 10V
COMMON MODE REJECTION
‐20 log | ∆V GS1‐2/ ∆VDS|
‐20 log | ∆V GS1‐2/ ∆VDS|
NOISE
CMR
‐‐
‐‐
90
90
‐‐
‐‐
dB
dB
∆VDS = 10 to 20V
∆VDS = 5 to 10V
VDG = 10V ID = 30µA RG = 10MΩ
f = 10Hz
VDG = 10V ID = 30µA f = 10Hz
VDG = 10V ID = 30µA f = 1KHz
ID = 30µA
ID = 30µA
NF
en
Figure
Voltage
‐‐
‐‐
‐‐
‐‐
20
10
1
70
‐‐
dB
nV/√Hz
CAPACITANCE
Input
Reverse Transfer
CISS
CRSS
‐‐
‐‐
‐‐
‐‐
3.0
1.5
pF
pF
VDS= 10V
VGS = 0 f = 1MHz
Note 1 – These ratings are limiting values above which the serviceability of any semiconductor may be impaired
TO-71 / TO-78 (Top View)
P-DIP / SOIC (Top View)
Available Packages:
LSU422 in TO-71 & TO-78
LSU422 in PDIP & SOIC
LSU422 available as bare die
Please contact Micross for full package and die dimensions
Email: chipcomponents@micross.com
Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or
other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.
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