Datasheet > LPC43S67JBD208

LPC43S67JBD208

更新时间： 2022-06-24 15:42:52

品牌	Logo	应用领域
恩智浦 - NXP		静态存储器
页数	文件大小	规格书
156页	7034K
描述
32-bit ARM Cortex-M4/M0 MCU; up to 1 MB flash and 154 kB SRAM; Ethernet, two High-speed USB, LCD, EMC, AES engine

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LPC43S67JBD208 数据手册

LPC43S6x

NXP Semiconductors

32-bit ARM Cortex-M4/M0 microcontroller

5. Block diagram

LPC43S6x

slaves

AHB MULTILAYER MATRIX

system

bus

masters

2 kB LOCAL SRAM

16 kB LOCAL SRAM

ARM

CORTEX-M0

SPI

SUBSYSTEM

SGPIO

TEST/DEBUG

INTERFACE

CORE-CORE

BRIDGE

TEST/DEBUG

INTERFACE

TEST/DEBUG

INTERFACE

ARM

CORTEX-M0

APPLICATION

HIGH-SPEED PHY

ARM

CORTEX-M4

ETHERNET

HIGH-SPEED

USB0

HIGH-SPEED

SD/

MMC

10/100

MAC

USB1

GPDMA

LCD

HOST/

HOST/DEVICE

IEEE 1588

DEVICE/OTG

masters

slaves

MAIN AHB MULTILAYER MATRIX

64 kB ROM

slaves

BRIDGE

BRIDGE 0

BRIDGE 1

BRIDGE 2

BRIDGE 3

BRIDGE

32 kB LOCAL SRAM

40 kB LOCAL SRAM

32 kB AHB SRAM

RI TIMER

USART2

USART3

TIMER2

TIMER3

SSP1

I C1

CGU

CCU1

CCU2

RGU

ALARM TIMER

WWDT

MOTOR

CONTROL

PWM

16 kB +

16 kB AHB SRAM

BACKUP REGISTERS

POWER MODE CONTROL

USART0

10-bit DAC

C_CAN0

I C0

UART1

SSP0

16 kB EEPROM

512 kB FLASH A

I S0

10-bit ADC0

10-bit ADC1

CONFIGURATION

REGISTERS

512 kB FLASH B

I S1

TIMER0

EVENT ROUTER

OTP MEMORY

SCTimer/PWM

C_CAN1

TIMER1

SCU

EMC

HS GPIO

SPIFI

QEI

RTC

RTC OSC

12 MHz IRC

RTC POWER DOMAIN

GIMA

GPIO

INTERRUPTS

GPIO GROUP0

INTERRUPT

AES ENCRYPTION/

DECRYPTION

GPIO GROUP1

INTERRUPT

= connected to GPDMA

aaa-018919

Fig 1. LPC43S6x Block diagram

LPC43S6X

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.3 — 13 January 2020

6 of 156

1...3 4 567 8 9...156

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