Datasheet > LPC43S70FET100

LPC43S70FET100

更新时间： 2024-04-09 18:58:45

品牌	Logo	应用领域
恩智浦 - NXP		静态存储器
页数	文件大小	规格书
157页	6922K
描述
32-Bit Arm^® Cortex^®-M4 + 2 X M0 MCU; 282 KB SRAM; Ethernet; Two HS USB...

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LPC43S70FET100 数据手册

LPC43S70

32-bit ARM Cortex-M4 + 2 x M0 MCU; 282 kB SRAM; Ethernet;

two HS USBs; 80 Msps 12-bit ADC; configurable peripherals,

AES engine

Rev. 1.3 — 10 January 2020

Product data sheet

1. General description

The LPC43S70 are ARM Cortex-M4 based microcontrollers for embedded applications

which include an ARM Cortex-M0 coprocessor and an ARM Cortex-M0 subsystem for

managing peripherals, 282 kB of SRAM, advanced configurable peripherals such as the

State Configurable Timer (SCTimer/PWM) and the Serial General Purpose I/O (SGPIO)

interface, security features with AES engine, two High-speed USB controllers, Ethernet,

LCD, an external memory controller, and multiple digital and analog peripherals including

a high-speed 12-bit ADC. The LPC43S70 operate at CPU frequencies of up to 204 MHz.

The ARM Cortex-M4 is a 32-bit core that offers system enhancements such as low power

consumption, enhanced debug features, and a high level of support block integration. The

ARM Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with

separate local instruction and data buses as well as a third bus for peripherals, and

includes an internal prefetch unit that supports speculative branching. The ARM

Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A

hardware floating-point unit is integrated in the core. The ARM Cortex-M4 with

floating-point unit is often referred to as M4F.

The LPC43S70 include an application ARM Cortex-M0 coprocessor and a second ARM

Cortex-M0 subsystem for managing the SGPIO and SPI peripherals. The ARM Cortex-M0

core is an energy-efficient and easy-to-use 32-bit core which is code- and tool-compatible

with the Cortex-M4 core. Both Cortex-M0 cores offer up to 204 MHz performance with a

simple instruction set and reduced code size. The Cortex-M0 does not support hardware

multiply.

2. Features and benefits

 Main Cortex-M4 processor

 ARM Cortex-M4 processor, running at frequencies of up to 204 MHz.

 Built-in Memory Protection Unit (MPU) supporting eight regions.

 Built-in Nested Vectored Interrupt Controller (NVIC).

 Hardware floating-point unit.

 Non-maskable Interrupt (NMI) input.

 JTAG and Serial Wire Debug (SWD), serial trace, eight breakpoints, and four watch

points.

 Enhanced Trace Module (ETM) and Enhanced Trace Buffer (ETB) support.

 System tick timer.

 Cortex-M0 coprocessor

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