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LP3982IMM-ADJ PDF预览

LP3982IMM-ADJ

更新时间: 2024-11-15 00:01:07
品牌 Logo 应用领域
美国国家半导体 - NSC 线性稳压器IC调节器电源电路光电二极管输出元件
页数 文件大小 规格书
13页 344K
描述
Micropower, Ultra Low-Dropout, Low-Noise, 300mA CMOS Regulator

LP3982IMM-ADJ 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:MSOP-8Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.1Is Samacsys:N
可调性:ADJUSTABLE最大回动电压 1:0.22 V
标称回动电压 1:0.12 VJESD-30 代码:S-PDSO-G8
JESD-609代码:e0长度:3 mm
最大电网调整率 (%/V):0.1湿度敏感等级:1
功能数量:1输出次数:1
端子数量:8工作温度TJ-Max:150 °C
最高工作温度:85 °C最低工作温度:-40 °C
最大输出电流 1:0.3 A最大输出电压 1:6 V
最小输出电压 1:1.25 V封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP8,.19
封装形状:SQUARE封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
认证状态:Not Qualified调节器类型:ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR
座面最大高度:1.09 mm子类别:Other Regulators
表面贴装:YES技术:CMOS
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:3 mm
Base Number Matches:1

LP3982IMM-ADJ 数据手册

 浏览型号LP3982IMM-ADJ的Datasheet PDF文件第2页浏览型号LP3982IMM-ADJ的Datasheet PDF文件第3页浏览型号LP3982IMM-ADJ的Datasheet PDF文件第4页浏览型号LP3982IMM-ADJ的Datasheet PDF文件第5页浏览型号LP3982IMM-ADJ的Datasheet PDF文件第6页浏览型号LP3982IMM-ADJ的Datasheet PDF文件第7页 
July 2002  
LP3982  
Micropower, Ultra Low-Dropout, Low-Noise, 300mA  
CMOS Regulator  
General Description  
Features  
n MAX8860 pin, package and spec. compatible  
n LLP space saving package  
n 300mA guaranteed output current  
The LP3982 low-dropout (LDO) CMOS linear regulator is  
available in 1.8V, 2.5V, 2.77V, 2.82V, 3.0V, 3.3V, and adjust-  
able versions. They deliver 300mA of output current. Pack-  
aged in an 8-Pin MSOP, the LP3982 is pin and package  
compatible with Maxim’s MAX8860. The LM3982 is also  
available in the small footprint LLP package.  
@
n 120mV typical dropout 300mA  
n 90µA typical quiescent current  
n 1nA typical shutdown mode  
n 60dB typical PSRR  
n 2.5V to 6V input range  
n 120µs typical turn-on time  
n Stable with small ceramic output capacitors  
The LP3982 suits battery powered applications because of  
its shutdown mode (1nA typ), low quiescent current (90µA  
typ), and LDO voltage (120mV typ). The low dropout voltage  
allows for more utilization of a battery’s available energy by  
operating closer to its end-of-life voltage. The LP3982’s  
PMOS output transistor consumes relatively no drive current  
compared to PNP LDO regulators.  
n 37µV RMS output voltage noise (10Hz to 100kHz)  
n Over temperature/over current protection  
n
2% output voltage tolerance  
This PMOS regulator is stable with small ceramic capacitive  
loads (2.2µF typ).  
Applications  
These devices also include regulation fault detection, a  
bandgap voltage reference, constant current limiting and  
thermal overload protection.  
n Wireless handsets  
n DSP core power  
n Battery powered electronics  
n Portable information appliances  
Application Circuit  
20036931  
© 2002 National Semiconductor Corporation  
DS200369  
www.national.com  

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