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LP3906SQ-JXXI/NOPB PDF预览

LP3906SQ-JXXI/NOPB

更新时间: 2024-11-15 12:58:19
品牌 Logo 应用领域
德州仪器 - TI 稳压器
页数 文件大小 规格书
47页 3088K
描述
Dual High-Current Step-Down DC/DC and Dual Linear Regulator with I<sup>2</sup>C Compatible Interface 24-WQFN -40 to 85

LP3906SQ-JXXI/NOPB 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:HVQCCN, LCC24,.16X.2,20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:1.46其他特性:ALSO HAS PFM CONTROL TECHNIQUE, ALSO OPERATES AS LDO REGULATOR
模拟集成电路 - 其他类型:SWITCHING REGULATOR控制模式:VOLTAGE-MODE
控制技术:PULSE WIDTH MODULATION最大输入电压:5.5 V
最小输入电压:2.7 V标称输入电压:3.6 V
JESD-30 代码:R-XQCC-N24JESD-609代码:e3
长度:5 mm湿度敏感等级:1
功能数量:1端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
最大输出电流:1.5 A最大输出电压:2 V
最小输出电压:0.8 V封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装等效代码:LCC24,.16X.2,20
封装形状:RECTANGULAR封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:0.8 mm子类别:Switching Regulator or Controllers
表面贴装:YES切换器配置:BUCK
最大切换频率:2000 kHz温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4 mm
Base Number Matches:1

LP3906SQ-JXXI/NOPB 数据手册

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LP3906  
www.ti.com  
SNVS456M AUGUST 2006REVISED MAY 2013  
Dual High-Current Step-Down DC/DC and Dual Linear Regulator with I2C Compatible  
Interface  
Check for Samples: LP3906  
1
FEATURES  
KEY SPECIFICATIONS  
2
Compatible with Advanced Applications  
Processors and FPGAs  
DC/DC Converter (Buck)  
1.5A Output Current  
2 LDOs for Powering Internal Processor  
Functions and I/Os  
Programmable VOUT from:  
Buck1 : 0.8V–2.0V  
Buck2 : 1.0V–3.5V  
High Speed Serial Interface for Independent  
Control of Device Functions and Settings  
Up to 96% Efficiency  
Precision Internal Reference  
2 MHz PWM Switching Frequency  
±3% Output Voltage Accuracy  
Automatic Soft Start  
Thermal Overload Protection  
Current Overload Protection  
24-lead 5 × 4 × 0.8 mm WQFN Package  
Software Programmable Regulators  
Linear Regulators (LDO)  
Programmable VOUT of 1.0V–3.5V  
±3% Output Voltage Accuracy  
300 mA Output Currents  
APPLICATIONS  
FPGA, DSP Core Power  
Applications Processors  
Peripheral I/O Power  
25 mW (Typ) Dropout  
DESCRIPTION  
The LP3906 is a multi-function, programmable Power  
Management Unit, optimized for low power FPGAs,  
Microprocessors and DSPs.  
Typical Application Circuits  
VINLDO12  
EN_T  
1 mF  
ENLDO1  
ENLDO2  
SYNC  
VIN1  
10 mF  
ENSW1  
ENSW2  
LDO1  
2.2 mH  
SW1  
FB1  
10 mF  
0.47 mF  
GND_SW1  
VINLDO1  
VINLDO2  
LDO2  
1 mF  
1 mF  
LP3906  
VIN2  
10 mF  
2.2 mH  
0.47 mF  
SW2  
FB2  
SDA  
SCL  
10 mF  
GND_SW2  
AVDD  
GND_L  
GND_C  
DAP  
1 mF  
Figure 1. Typical Application Circuit  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2006–2013, Texas Instruments Incorporated  

LP3906SQ-JXXI/NOPB 替代型号

型号 品牌 替代类型 描述 数据表
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