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LP38690SDX-ADJ PDF预览

LP38690SDX-ADJ

更新时间: 2024-11-14 22:46:59
品牌 Logo 应用领域
美国国家半导体 - NSC 稳压器电容器
页数 文件大小 规格书
13页 776K
描述
1A Low Dropout CMOS Linear Regulators with Adjustable Output Stable with Ceramic Output Capacitors

LP38690SDX-ADJ 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:LLP-6Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.11可调性:ADJUSTABLE
标称回动电压 1:0.5 VJESD-30 代码:S-PDSO-N6
JESD-609代码:e0长度:3 mm
最大电网调整率 (%/V):0.1最大负载调整率 (%):5%
湿度敏感等级:1功能数量:1
输出次数:1端子数量:6
工作温度TJ-Max:125 °C工作温度TJ-Min:-40 °C
最大输出电流 1:1 A最大输出电压 1:9 V
最小输出电压 1:1.25 V封装主体材料:PLASTIC/EPOXY
封装代码:HVSON封装等效代码:SOLCC6,.13,38
封装形状:SQUARE封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
认证状态:Not Qualified调节器类型:ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR
座面最大高度:0.8 mm子类别:Other Regulators
表面贴装:YES技术:CMOS
端子面层:Tin/Lead (Sn/Pb)端子形式:NO LEAD
端子节距:0.95 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:3 mm
Base Number Matches:1

LP38690SDX-ADJ 数据手册

 浏览型号LP38690SDX-ADJ的Datasheet PDF文件第2页浏览型号LP38690SDX-ADJ的Datasheet PDF文件第3页浏览型号LP38690SDX-ADJ的Datasheet PDF文件第4页浏览型号LP38690SDX-ADJ的Datasheet PDF文件第5页浏览型号LP38690SDX-ADJ的Datasheet PDF文件第6页浏览型号LP38690SDX-ADJ的Datasheet PDF文件第7页 
January 2005  
LP38690-ADJ/LP38692-ADJ  
1A Low Dropout CMOS Linear Regulators with  
Adjustable Output  
Stable with Ceramic Output Capacitors  
General Description  
The LP38690/2-ADJ low dropout CMOS linear regulators  
provide 2.5% precision reference voltage, extremely low  
Features  
n Output voltage range of 1.25V - 9V  
n 2.5% adjust pin voltage accuracy (25˚C)  
@
dropout voltage (450mV 1A load current, VOUT = 5V) and  
@
n Low dropout voltage: 450mV 1A (typ, 5V out)  
n Wide input voltage range (2.7V to 10V)  
n Precision (trimmed) bandgap reference  
n Guaranteed specs for -40˚C to +125˚C  
n 1µA off-state quiescent current  
excellent AC performance utilizing ultra low ESR ceramic  
output capacitors.  
The low thermal resistance of the LLP and SOT-223 pack-  
ages allow the full operating current to be used even in high  
ambient temperature environments.  
n Thermal overload protection  
The use of a PMOS power transistor means that no DC base  
drive current is required to bias it allowing ground pin current  
to remain below 100 µA regardless of load current, input  
voltage, or operating temperature.  
n Foldback current limiting  
n SOT-223 and 6-Lead LLP packages  
n Enable pin (LP38692-ADJ)  
@
Dropout Voltage: 450 mV (typ) 1A (typ. 5V out).  
Applications  
Ground Pin Current: 55 µA (typ) at full load.  
Adjust Pin Voltage: 2.5% (25˚C) accuracy.  
n Hard Disk Drives  
n Notebook Computers  
n Battery Powered Devices  
n Portable Instrumentation  
Typical Application Circuits  
20126701  
20126702  
VOUT = VADJ x (1 + R1/R2)  
Note: *Minimum value required for stability.  
© 2005 National Semiconductor Corporation  
DS201267  
www.national.com  

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