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LP2966IMM-2828 PDF预览

LP2966IMM-2828

更新时间： 2024-11-21 22:19:47
品牌 Logo 应用领域
美国国家半导体 - NSC 稳压器
页数 文件大小 规格书
15页 460K
描述
Dual 150mA Ultra Low-Dropout Regulator

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LP2966IMM-2828 技术参数

是否Rohs认证： 不符合生命周期：Transferred
包装说明：MSOP-8Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.15可调性：FIXED
最大回动电压 1：0.27 V标称回动电压 1：0.135 V
最大回动电压 2：0.27 V最大绝对输入电压：7.5 V
最大输入电压：7 V最小输入电压：2.7 V
JESD-30 代码：S-PDSO-G8JESD-609代码：e0
长度：3 mm最大电网调整率：0.0028%
最大负载调整率：0.01%湿度敏感等级：1
功能数量：1输出次数：2
端子数量：8工作温度TJ-Max：125 °C
工作温度TJ-Min：-40 °C最大输出电流 1：0.15 A
最大输出电流 2：0.15 A最大输出电压 1：2.898 V
最小输出电压 1：2.702 V标称输出电压 1：2.8 V
最大输出电压 2：2.898 V最小输出电压 2：2.702 V
标称输出电压 2：2.8 V封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP8,.19
封装形状：SQUARE封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：260
认证状态：Not Qualified调节器类型：FIXED POSITIVE MULTIPLE OUTPUT LDO REGULATOR
座面最大高度：1.09 mm子类别：Other Regulators
表面贴装：YES技术：CMOS
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40最大电压容差：3.5%
宽度：3 mmBase Number Matches：1

LP2966IMM-2828 数据手册

 浏览型号LP2966IMM-2828的Datasheet PDF文件第2页浏览型号LP2966IMM-2828的Datasheet PDF文件第3页浏览型号LP2966IMM-2828的Datasheet PDF文件第4页浏览型号LP2966IMM-2828的Datasheet PDF文件第5页浏览型号LP2966IMM-2828的Datasheet PDF文件第6页浏览型号LP2966IMM-2828的Datasheet PDF文件第7页 
April 2000  
LP2966  
Dual 150mA Ultra Low-Dropout Regulator  
General Description  
Features  
n Ultra low drop-out voltage  
n Low ground pin current  
The LP2966 dual ultra low-dropout (LDO) regulator operates  
from a +2.70V to +7.0V input supply. Each output delivers  
150mA over full temperature range. The IC operates with ex-  
tremely low drop-out voltage and quiescent current, which  
makes it very suitable for battery powered and portable ap-  
plications. Each LDO in the LP2966 has independent shut-  
down capability. The LP2966 provides low noise perfor-  
mance with low ground pin current in an extremely small  
MSOP-8 package (refer to package dimensions and connec-  
tion diagram for more information on MSOP-8 package). A  
wide range of preset voltage options are available for each  
output. In addition to the voltage combinations listed in the  
ordering information table, many more are available upon re-  
quest with minimum orders. In all, 256 voltage combinations  
are possible.  
<
n
1µA quiescent current in shutdown mode  
n Independent shutdown of each LDO regulator  
n Output voltage accuracy 1%  
n Guaranteed 150mA output current at each output  
n Low output noise  
n Error Flags indicate status of each output  
n Available in MSOP-8 surface mount packages  
n Low output capacitor requirements (1µF)  
n Operates with Low ESR ceramic capacitors in most  
applications  
±
n Over temperature/over current protection  
n -40˚C to +125˚C junction temperature range  
Key Specifications  
Dropout Voltage: Varies linearly with load current. Typically  
0.9 mV at 1mA load current and 135mV at 150mA load cur-  
rent.  
Applications  
n Cellular and Wireless Applications  
n Palmtop/Laptop Computer  
n GPS systems  
Ground Pin Current: Typically 300µA at 1mA load current  
and 340µA at 100mA load current (with one shutdown pin  
pulled low).  
n Flat panel displays  
n Post regulators  
n USB applications  
n Hand held equipment and multimeters  
n Wireless data terminals  
n Other battery powered applications  
Shutdown Mode: Less than 1µA quiescent current when  
both shutdown pins are pulled low.  
Error Flag: Open drain output, goes low when the corre-  
sponding output drops 10% below nominal.  
Precision Output Voltage: Multiple output voltage options  
available ranging from 1.8V to 5.0V with a guaranteed accu-  
±
racy of 1% at room temperature.  
Typical Application Circuit  
DS100850-30  
*SD1 and SD2 must be actively terminated through a pull up resistor. Tie to V if not used.  
IN  
**ERROR1 and ERROR2 are open drain outputs. These pins must be connected to ground if not used.  
# Minimum output capacitance is 1µF to insure stability over full load current range. More capacitance improves superior dynamic performance and provides  
additional stability margin.  
© 2000 National Semiconductor Corporation  
DS100850  
www.national.com  
1234567...15

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