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LMK1C1108PWR PDF预览

LMK1C1108PWR

更新时间: 2022-06-24 15:42:36
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
25页 2230K
描述
LMK1C110x 1.8-V, 2.5-V, and 3.3-V LVCMOS Clock Buffer Family

LMK1C1108PWR 数据手册

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LMK1C1106, LMK1C1108  
SNAS814 – DECEMBER 2020  
LMK1C110x 1.8-V, 2.5-V, and 3.3-V LVCMOS Clock Buffer Family  
1 Features  
3 Description  
High-performance 1:6 and 1:8 LVCMOS clock  
buffer  
Very low output skew < 55 ps  
Extremely low additive jitter < 25-fs nominal  
– 12-fs typical at VDD = 3.3 V  
The LMK1C110x is a modular, high-performance, low-  
skew, general-purpose clock buffer family from Texas  
Instruments.  
The entire family is designed with a modular approach  
in mind. Five different fan-out variations, 1:2, 1:3, 1:4,  
1:6 and 1:8 are available.  
– 15-fs typical at VDD = 2.5 V  
– 28-fs typical at VDD = 1.8 V  
Very low propagation delay < 3 ns  
Synchronous output enable  
All of the devices within this family are pin-compatible  
to each other and backwards compatible to the  
CDCLVC110x family for easy handling.  
Supply voltage: 3.3 V, 2.5 V, or 1.8 V  
– 3.3-V tolerant input at all supply voltages  
Industry high ESD rating of 9000 V HBM  
fmax = 250 MHz for 3.3 V  
fmax = 200-MHz for 2.5 V and 1.8 V  
Operating temperature range: –40 °C to 125 °C  
Available in 14-pin and 16-pin TSSOP package  
All family members share the same high performing  
characteristics such as low additive jitter, low skew,  
and wide operating temperature range.  
The LMK1C110x supports a synchronous output  
enable control (1G) which switches the outputs into a  
low state when 1G is low.  
The LMK1C110x family operates in a 1.8-V, 2.5-V and  
3.3-V environment and are characterized for operation  
from – 40 °C to 125 °C.  
2 Applications  
Factory automation & control  
Telecommunications equipment  
Data center & enterprise computing  
Grid infrastructure  
Motor drives  
Medical imaging  
Device Information  
PART NUMBER  
LMK1C1106  
PACKAGE  
TSSOP (14)  
TSSOP (16)  
BODY SIZE (NOM)  
5.00 mm x 4.40 mm  
5.00 mm x 4.40 mm  
LMK1C1108  
CLKIN  
1G  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
Y1  
Y3  
CLKIN  
LVCMOS  
LVCMOS  
Y0  
Y0  
VDD  
Y2  
GND  
VDD  
Y4  
LMK1C1106  
GND  
Y5  
LVCMOS  
Y1  
GND  
8
VDD  
CLKIN  
1G  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
Y1  
Y3  
Y0  
VDD  
Y2  
GND  
VDD  
Y4  
LMK1C1108  
GND  
Y5  
LVCMOS  
Y7  
GND  
Y6  
VDD  
Y7  
1G  
Functional Block Diagram  
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 

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