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LMH0356

更新时间： 2024-11-22 11:14:19
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德州仪器 - TI 时钟复用器
页数 文件大小 规格书
30页 1024K
描述
具有 4:1 输入多路复用器和 FR4 均衡器的 3G HD/SD SDI 时钟恢复器

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中文翻译

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LMH0356 数据手册

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Sample &  
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LMH0356  
SNLS270L –AUGUST 2007–REVISED JANUARY 2016  
LMH0356 3-Gbps HD/SD SDI Reclocker with 4:1 Input Mux and FR4 EQs  
1 Features  
3 Description  
The LMH0356 3-Gbps HD/SD SDI Reclocker with 4:1  
Input Mux and FR4 EQs retimes serial digital video  
data conforming to the SMPTE ST-424, ST-292, and  
ST-259 standards. The LMH0356 operates at serial  
data rates of 270 Mbps, 1.483 Gbps, 1.485 Gbps,  
2.967 Gbps, and 2.97 Gbps. The LMH0356 supports  
DVB-ASI operation at 270 Mbps. The LMH0356  
includes an integrated 4:1 input multiplexer for  
selecting one of four input data streams for retiming.  
In addition, the four inputs of the LMH0356 each have  
an FR4 equalizer capable of equalizing 0 to 30 inches  
of FR4 trace length.  
1
•
Supports SMPTE ST-424, ST-292, and ST-259  
Serial Digital Video Standards  
•
Supports 270-Mbps, 1.483-Gbps, 1.485-Gbps,  
2.967-Gbps, and 2.97-Gbps Serial Data Rate  
Operation  
•
•
•
•
•
Supports DVB-ASI at 270 Mbps  
Single 3.3-V Supply Operation  
430-mW Typical Power Consumption  
Integrated 4:1 Multiplexed Input  
0 to 30-inch FR4 Equalizer on Each Multiplexed  
Input  
The LMH0356 automatically detects the incoming  
data rate and adjusts itself to retime the incoming  
data to suppress accumulated jitter. The LMH0356  
recovers the serial data-rate clock and optionally  
provides it as an output. The LMH0356 has two  
differential serial data outputs; the second output may  
be selected as a low-jitter, data-rate clock output.  
Controls and indicators are: serial clock or second  
serial data output select, manual rate select input,  
SD/HD rate indicator output, lock detect output,  
auto/manual data bypass, output mute, and device  
enable. The serial data inputs, outputs, and serial  
clock outputs are differential LVPECL compatible.  
The CML serial data and serial clock outputs are  
suitable for driving 100-Ω differentially terminated  
networks. The control logic inputs and outputs are  
LVCMOS compatible.  
•
•
Two Differential, Reclocked Outputs  
Choice of Second Reclocked Output or  
Recovered Clock Output  
•
Single 27-MHz External Crystal or Reference  
Clock Input  
•
•
•
•
•
•
Manual Rate Select Input  
SD/HD Operating Rate Indicator Output  
Lock Detect Indicator Output  
Output Mute Function for Data and Clock  
Auto/Manual Reclocker Bypass  
Power Saver Mode With Device Power-Down  
Control (10-mW Typical Power Consumption in  
Disabled State)  
•
Differential LVPECL-Compatible Serial Data  
Inputs and Outputs  
Device Information(1)  
PART NUMBER  
PACKAGE  
WQFN (40)  
WQFN (48)  
BODY SIZE (NOM)  
5.00 mm x 5.00 mm  
7.00 mm x 7.00 mm  
•
•
•
•
LVCMOS Control Inputs and Indicator Outputs  
48-Pin WQFN or 40-Pin WQFN Package  
Industrial Temperature Range: –40°C to 85°C  
LMH0356  
(1) For all available packages, see the orderable addendum at  
the end of the data sheet.  
48-Pin WQFN Version Footprint-Compatible with  
the LMH0056 and LMH0036  
Functional Block Diagram  
2 Applications  
SCO_EN  
HD  
SD/  
BYPASS/  
AUTO BYPASS  
RATE0  
CONTROL LOGIC  
LOCK DETECT  
•
SDTV/HDTV and 3-Gbps Serial Digital Video  
Interfaces for:  
RATE1  
ENABLE  
V
CCO  
BYPASS  
50  
–
–
Digital Video Routers and Switchers  
50  
XTAL IN/EXT CLK  
SCO/SDO2  
SCO/SDO2  
XTAL OUT  
LOOP FILTER 1  
Digital Video Processing and Editing  
Equipment  
VCO / PLL  
LOOP FILTER 2  
O/P MUTE  
V
CCO  
–
–
DVB-ASI Equipment  
SDI0  
SDI0  
EQUALIZER  
50  
Video Standards and Format Converters  
50  
SDI1  
SDI1  
EQUALIZER  
EQUALIZER  
EQUALIZER  
SDO  
SDO  
RETIMER / FIFO  
SDI2  
SDI2  
SDI3  
SDI3  
SEL0  
SEL1  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
 
 
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