LM5166
www.ti.com.cn
ZHCSFV4B –DECEMBER 2016–REVISED JUNE 2017
5 Pin Configuration and Functions
LM5166X and LM5166Y Fixed Output DRC Package
LM5166 Adjustable Output DRC Package
10-Pin VSON
Top View
10-Pin VSON
Top View
GND
HYS
GND
HYS
FB
SW
VIN
ILIM
SS
1
2
3
4
5
10
9
SW
VIN
ILIM
SS
1
2
3
4
5
10
9
8
8
VOUT
EN
7
7
EN
PGOOD
PGOOD
6
6
RT
RT
Pin Functions
PIN
I/O(1)
DESCRIPTION
NO.
NAME
Switching node that is internally connected to the drain of the PFET buck switch (high side) and the
drain of the NFET synchronous rectifier (low side). Connect to the buck inductor.
1
SW
P
Regulator supply input pin to high-side power MOSFET and internal bias rail LDO. Connect to input
supply and input filter capacitor CIN. The path from the VIN pin to the input capacitor must be as short as
possible.
2
3
VIN
P
I
Programming pin for current limit. Connecting the appropriate resistance from the ILIM pin to GND
selects one of the three current limit options. The available current limit options are detailed in 表 3.
ILIM
Programming pin for the soft-start delay. If a 100-kΩ resistor is connected from the SS pin to GND, the
internal soft-start circuit is disabled and the FB comparator reference steps immediately from zero to full
value when the regulator is enabled by the EN input. If the SS pin is left open, the internal soft-start
circuit ramps the FB reference from zero to full value in 900 µs. If a capacitor is connected from the SS
pin to GND, the soft-start time can be set longer than 900 µs.
4
5
SS
RT
I
I
Mode select and on-time programming pin for Constant On-Time control. Connect a resistor from the RT
pin to GND to program the on-time and hence switching frequency. Short RT to GND to select PFM
(pulse frequency modulation) operation.
Power Good output flag pin. PGOOD is connected to the drain of an NFET that holds the pin low when
either FB or VOUT is not in regulation. Use a 10-kΩ to 100-kΩ pullup resistor to system voltage rail or
VOUT (no higher than 12 V).
6
7
PGOOD
EN
O
I
Input pin of the precision enable / UVLO comparator. The regulator is enabled when the EN pin voltage
is greater than 1.22 V.
Feedback input to the voltage regulation loop for the LM5166 Adjustable Output version, or a VOUT pin
connects the internal feedback resistor divider to the regulator output voltage for the fixed 3.3-V or 5-V
options. The FB pin connects the internal feedback comparator to an external resistor divider for the
adjustable voltage option, and the reference for the FB pin comparator is 1.223 V.
8
9
VOUT or FB
HYS
I
Drain of internal NFET that is turned off when the EN input is greater than the EN pin threshold. External
resistors from HYS to EN and GND program the input UVLO threshold and hysteresis.
O
10
—
GND
PAD
G
P
Regulator ground return.
Connect to GND pin and system ground on PCB. Path to CIN must be as short as possible.
(1) P = Power, G = Ground, I = Input, O = Output.
Copyright © 2016–2017, Texas Instruments Incorporated
3