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LM3524D PDF预览

LM3524D

更新时间: 2024-11-26 11:13:55
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德州仪器 - TI 控制器
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29页 1464K
描述
40V、0.2A 350KHz PWM 控制器

LM3524D 数据手册

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LM2524D, LM3524D  
www.ti.com  
SNVS766E JUNE 2009REVISED MAY 2013  
LM2524D/LM3524D Regulating Pulse Width Modulator  
Check for Samples: LM2524D, LM3524D  
The LM3524D has a ±1% precision 5V reference.  
1
FEATURES  
The current carrying capability of the output drive  
transistors has been raised to 200 mA while reducing  
VCEsat and increasing VCE breakdown to 60V. The  
common mode voltage range of the error-amp has  
been raised to 5.5V to eliminate the need for a  
resistive divider from the 5V reference.  
2
Fully Interchangeable With Standard LM3524  
Family  
±1% Precision 5V Reference With Thermal  
Shut-Down  
Output Current to 200 mA DC  
60V Output Capability  
In the LM3524D the circuit bias line has been isolated  
from the shut-down pin. This prevents the oscillator  
pulse amplitude and frequency from being disturbed  
by shut-down. Also at high frequencies (300 kHz)  
the max. duty cycle per output has been improved to  
44% compared to 35% max. duty cycle in other  
3524s.  
Wide Common Mode Input Range for Error-  
Amp  
One Pulse per Period (Noise Suppression)  
Improved Max. Duty Cycle at High Frequencies  
Double Pulse Suppression  
In addition, the LM3524D can now be synchronized  
externally, through pin 3. Also a latch has been  
added to insure one pulse per period even in noisy  
environments. The LM3524D includes double pulse  
suppression logic that insures when a shut-down  
condition is removed the state of the T-flip-flop will  
change only after the first clock pulse has arrived.  
This feature prevents the same output from being  
pulsed twice in a row, thus reducing the possibility of  
core saturation in push-pull designs.  
Synchronize Through Pin 3  
DESCRIPTION  
The LM3524D family is an improved version of the  
industry standard LM3524. It has improved  
specifications and additional features yet is pin for pin  
compatible with existing 3524 families. New features  
reduce the need for additional external circuitry often  
required in the original version.  
Connection Diagram  
Figure 1. Top View  
See Package Number NFG  
See Package Number D  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2009–2013, Texas Instruments Incorporated  

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