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LM2726MX/NOPB PDF预览

LM2726MX/NOPB

更新时间: 2024-11-21 21:03:55
品牌 Logo 应用领域
美国国家半导体 - NSC 驱动光电二极管接口集成电路驱动器
页数 文件大小 规格书
9页 159K
描述
IC 3 A HALF BRDG BASED MOSFET DRIVER, PDSO8, PLASTIC, SO-8, MOSFET Driver

LM2726MX/NOPB 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:SOP, SOP8,.25Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.2高边驱动器:YES
接口集成电路类型:HALF BRIDGE BASED MOSFET DRIVERJESD-30 代码:R-PDSO-G8
JESD-609代码:e3长度:4.9 mm
湿度敏感等级:1功能数量:1
端子数量:8标称输出峰值电流:3 A
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:5 V认证状态:Not Qualified
座面最大高度:1.75 mm子类别:MOSFET Drivers
最大供电电压:7 V最小供电电压:4 V
标称供电电压:5 V表面贴装:YES
技术:CMOS端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:3.9 mmBase Number Matches:1

LM2726MX/NOPB 数据手册

 浏览型号LM2726MX/NOPB的Datasheet PDF文件第2页浏览型号LM2726MX/NOPB的Datasheet PDF文件第3页浏览型号LM2726MX/NOPB的Datasheet PDF文件第4页浏览型号LM2726MX/NOPB的Datasheet PDF文件第5页浏览型号LM2726MX/NOPB的Datasheet PDF文件第6页浏览型号LM2726MX/NOPB的Datasheet PDF文件第7页 
November 2000  
LM2725/LM2726  
High Speed Synchronous MOSFET Drivers  
needed by the top MOSFET can be obtained through an  
external bootstrap structure. Minimum pulse width is as low  
as 55ns.  
General Description  
The LM2725/LM2726 is a family of dual MOSFET drivers  
that can drive both the top MOSFET and bottom MOSFET in  
a push-pull structure simultaneously. It takes a logic level  
PWM input and splits it into two complimentary signals with  
Features  
n High peak output current  
n Adaptive shoot-through protection  
n 36V SW pin absolute maximum voltage  
n Input Under-Voltage-Lock-Out  
n Typical 20ns internal delay  
n Plastic 8-pin SO package  
a
typical 20ns dead time in between. The built-in  
shoot-through protection circuitry prevents the top and bot-  
tom FETs from turning on simultaneously. With a bias volt-  
age of 5V, the peak sourcing and sinking current for each  
driver of the LM2725 is about 1.2A and that of the LM2726 is  
about 3A. In an SO-8 package, each driver is able to handle  
50mA  
average  
current.  
Input  
UVLO  
(Under-Voltage-Lock-Out) ensures that all the driver outputs  
stay low until the supply rail exceeds the power-on threshold  
during system power on, or after the supply rail drops below  
power-on threshold by a specified hysteresis during system  
power down. The cross-conduction protection circuitry de-  
tects both the driver outputs and will not turn on a driver until  
the other driver output is low. The top gate bias voltage  
Applications  
n High Current DC/DC Power Supplies  
n High Input Voltage Switching Regulators  
n Microprocessors  
Typical Application  
DS200072-1  
Connection Diagram  
8-Lead Small Outline Package  
DS200072-2  
Top View  
© 2000 National Semiconductor Corporation  
DS200072  
www.national.com  

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