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LM2633

更新时间: 2024-11-22 22:01:47
品牌 Logo 应用领域
美国国家半导体 - NSC 稳压器电脑控制器
页数 文件大小 规格书
40页 1348K
描述
Advanced Two-Phase Synchronous Triple Regulator Controller for Notebook CPUs

LM2633 数据手册

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August 2001  
LM2633  
Advanced Two-Phase Synchronous Triple Regulator  
Controller for Notebook CPUs  
General Description  
Features  
The LM2633 is a feature-rich IC that combines three regu-  
lator controllers - two current mode synchronous buck regu-  
lator controllers and a linear regulator controller.  
GENERAL  
n Three regulated output voltages  
n 4.5V to 30V input range  
n Power good function  
n Input under-voltage lockout  
n Thermal shutdown  
The two switching regulator controllers operate 180˚ out of  
phase. This feature reduces the input ripple RMS current,  
resulting in a smaller input filter.  
The first switching controller (Channel 1) features an Intel  
mobile CPU compatible precision 5-bit digital-to-analog con-  
verter which programs the output voltage from 0.925V to  
2.00V. It is also compatible with the dynamic VID require-  
ments. The second switching controller (Channel 2) is ad-  
justable between 1.25V to 6.0V.  
n Tiny TSSOP package  
SWITCHING SECTION  
n Two channels operating 180˚ out of phase  
n Separate on/off control for each channel  
n Current mode control without sense resistor  
n Skip-mode operation available  
n Adjustable cycle-by-cycle current limit  
n Negative current limit  
n Analog soft start independent of input voltage slew rate  
n Power ground pins separate  
n Output UVP and OVP  
Use of synchronous rectification and pulse-skip operation at  
light load achieves high efficiency over a wide load range.  
Fixed-frequency operation can be obtained by disabling the  
pulse-skip mode.  
Current-mode feedback control assures excellent line and  
load regulation and a wide loop bandwidth for good re-  
sponse to fast load transient events. Current mode control is  
achieved through sensing the Vds of the top FET and thus  
an external sense resistor is not necessary.  
n Programmable output UVP delay  
n 250kHz switching frequency (for Vin 17V)  
n Channel 1 output from 0.925V to 2.00V  
<
A power good signal is available to indicate the general  
health of the output voltages.  
±
±
n
n
1.5% DAC accuracy from 0˚C to 125˚C  
1.7% initial tolerance for Channel 2  
A unique feature is the analog soft-start for the switching  
controllers is independent of the slew rate of the input volt-  
age. This will make the soft start behavior more predictable  
and controllable. An internal 5V rail is available externally for  
boot-strap circuitry (only) when no 5V is available from other  
sources.  
n Dynamic VID change ready  
n Power good flags VID changes  
n Channel 2 output from 1.3V to 6.0V  
LINEAR SECTION  
n Output voltage adjustable  
n 50mA maximum driving current  
n Output UVP  
Current limit for either of the two switching channels is  
achieved through sensing the top FET VDS and the value is  
adjustable. The two switching controllers have under-voltage  
and over-voltage latch protections, and the linear regulator  
has under-voltage latch protection. Under-voltage latch can  
be disabled or delayed by a programmable amount of time.  
±
n
2% initial tolerance  
Applications  
n Power supply for CPUs of notebook PCs that require  
The input voltage for the switching channels ranges from 5V  
to 30V, which makes possible the choice of different battery  
chemistries and options.  
the SpeedStep technique  
n Power supply for information appliances  
n General low voltage DC/DC buck regulators  
SpeedStep is a trademark of Intel Corporation.  
© 2001 National Semiconductor Corporation  
DS200008  
www.national.com  

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