November 2005
LM25115
Secondary Side Post Regulator Controller
General Description
Features
n Self-synchronization to main channel output
n Free-run mode for buck regulation of DC input
n Leading edge pulse width modulation
n Voltage-mode control with current injection and input line
feed-forward
The LM25115 controller contains all of the features neces-
sary to implement multiple output power converters utilizing
the Secondary Side Post Regulation (SSPR) technique. The
SSPR technique develops a highly efficient and well regu-
lated auxiliary output from the secondary side switching
waveform of an isolated power converter. Regulation of the
auxiliary output voltage is achieved by leading edge pulse
width modulation (PWM) of the main channel duty cycle.
Leading edge modulation is compatible with either current
mode or voltage mode control of the main output. The
LM25115 drives external high side and low side NMOS
power switches configured as a synchronous buck regulator.
A current sense amplifier provides overload protection and
operates over a wide common mode input range. Additional
features include a low dropout (LDO) bias regulator, error
amplifier, precision reference, adaptive dead time control of
the gate signals and thermal shutdown.
n Operates from AC or DC input up to 42V
n Wide 4.5V to 30V bias supply range
n Wide 0.75V to 13.5V output range.
n Top and bottom gate drivers sink 2.5A peak
n Adaptive gate driver dead-time control
n Wide bandwidth error amplifier (4MHz)
n Programmable soft-start
n Thermal shutdown protection
n TSSOP-16 or thermally enhanced LLP-16 packages
Typical Application Circuit
20172601
FIGURE 1. Simplified Multiple Output Power Converter Utilizing SSPR Technique
© 2005 National Semiconductor Corporation
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