LM1291N PDF预览

LM1291N

更新时间: 2025-07-23 22:51:59
品牌 Logo 应用领域
美国国家半导体 - NSC 商用集成电路光电二极管监视器
页数 文件大小 规格书
12页 207K
描述
Video PLL System for Continuous-Sync Monitors

LM1291N 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP28,.6Reach Compliance Code:unknown
风险等级:5.63应用:MONITOR
商用集成电路类型:HORIZONTAL DEFLECTION ICJESD-30 代码:R-PDIP-T28
JESD-609代码:e0端子数量:28
最高工作温度:80 °C最低工作温度:-20 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP28,.6封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:12 V认证状态:Not Qualified
子类别:Other Consumer ICs最大压摆率:40 mA
最大供电电压 (Vsup):13.2 V最小供电电压 (Vsup):10.8 V
表面贴装:NO技术:BIPOLAR
温度等级:COMMERCIAL EXTENDED端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
Base Number Matches:1

LM1291N 数据手册

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June 1995  
LM1291  
Video PLL System for Continuous-Sync Monitors  
General Description  
Features  
Y
Wide continuous autosync rangeÐ22 kHz to 125 kHz  
(1:5.7) with no component switching or external adjust-  
ments  
The LM1291 is an integrated horizontal time base solution  
specifically designed to operate in continuous-sync video  
monitors. It automatically synchronizes to any H frequency  
from 22 kHz to 125 kHz and provides the drive pulse to the  
high power deflection circuit.  
Y
No manufacturing trims requiredÐinternal VCO capaci-  
tor trimmed on chip  
Y
Y
Y
Y
No costly high-precision components needed  
Low phase jitter (1.3 ns at 100 kHz)  
DC controlled H phase and duty cycle  
Video mute pulse for blanking during H frequency  
transitions  
Available sync processing includes a vertical sync separator  
and a composite video sync stripper. An internal sync selec-  
tion scheme gives highest priority to separate H and V sync,  
then composite sync, and finally sync on video; no external  
switching between sync sources is necessary. The LM1291  
provides polarity-normalized H/HV and V sync outputs,  
along with logic flags which show the respective input polar-  
ities.  
Y
Y
Y
Y
Input sync prioritization  
Clamp pulse position and width control  
Continuous clamp pulse output, even with no sync input  
Resistor-programmable minimum and maximum VCO  
frequency  
The design uses an on-chip FVC (Frequency-to-Voltage  
Converter) to set the center frequency of the VCO (Voltage-  
Controlled Oscillator). This technique allows autosync oper-  
ation over the entire frequency range using just one opti-  
mized set of external components.  
Y
X-ray input disables H drive and mutes video until V  
powered down  
CC  
Y
Y
k
9.5V  
H drive disabled for V  
CC  
The system includes a second phase detector which com-  
pensates for storage time variation in the horizontal output  
transistor; the picture’s horizontal position is thus indepen-  
dent of temperature and component variance.  
Horizontal output transistor protected against accidental  
turn-on during flyback  
Y
Capacitor-programmable frequency ramping, df /dt,  
VCO  
H output transistor during scanning mode  
protects  
changes  
The LM1291 provides DC control pins for H Drive duty cycle  
and flyback phase.  
Connection Diagram  
TL/H/12323–1  
FIGURE 1  
Order Number LM1291N  
See NS Package Number N28B  
C
1995 National Semiconductor Corporation  
TL/H/12323  
RRD-B30M115/Printed in U. S. A.  

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