Datasheet > LM10504TMX

LM10504TMX

更新时间： 2024-01-29 10:52:22

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
35页	777K
描述
Triple Buck + LDO Power Management Unit

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LM10504TMX 数据手册

February 14, 2012

LM10504

Triple Buck + LDO Power Management Unit

1.0 General Description

4.0 Features

The LM10504 is an advanced PMU containing three config-

urable, high-efficiency buck regulators for supplying variable

voltages. The device is ideal for supporting ASIC and SOC

designs for Solid-State and Flash drives.

Three highly efficient programmable buck regulators

■

Integrated FETs with low R_DSON

—

Bucks operate with their phases shifted to reduce the

input current ripple and capacitor size

The LM10504 operates cooperatively with ASIC to optimize

the supply voltage for low-power conditions and Power Sav-

ing modes via the SPI interface. It also supports a 250 mA

LDO and a programmable Interrupt Comparator.

Programmable Output Voltage via the SPI interface

Overvoltage and Undervoltage Lockout

—

Automatic internal soft start with Power-on reset

Current overload and thermal shutdown protection

PFM mode for low-load, high-efficiency operation

2.0 Key Specifications

Power-down data protection enhances data integrity

■

Programmable Buck Regulators:

■

Bypass mode available on Bucks 1 and 2

—

Buck 1: 1.1V to 3.6V; 1.6A

Buck 2: 1.1V to 3.6V; 1A

Buck 3: 0.7V to 1.335V; 1A

—

Deep sleep mode to save power during idle times

DEVSLP function

—

Programmable Low-dropout LDO 1.2V to 3.1V, up to 250

SPI-programmable interrupt comparator (2.0V to 4.0V)

Alternate Buck V_OUTSselectable via V_SELECTlogic pins

Customizable startup sequencing for varied controllers

RESET pin

±3% feedback voltage accuracy

■

Up to 95% efficient buck regulators

■

2MHz switching frequency for smaller inductor size

2.8 x 2.8 mm, 0.4 mm pitch 34-bump micro SMD package

3.0 Applications

Solid-State Drives

■

5.0 Typical Application Diagram

30176901

301769 SNVS739B

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