Datasheet > LH5324C00

LH5324C00

更新时间： 2024-11-16 22:15:47

品牌	Logo	应用领域
夏普 - SHARP		/
页数	文件大小	规格书
6页	56K
描述
CMOS 24M (1.5M x 16) MROM

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中文翻译

获取价格

数据手册

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LH5324C00 数据手册

LH5324C00

CMOS 24M (1.5M × 16) MROM

FEATURES

PIN CONNECTIONS

• 1,572,864 × 16 bit organization

42-PIN DIP

TOP VIEW

• Access time: 120 ns (MAX.)

A₁₈

A₁₇

A₇

42 A₁₉

41 A₈

40 A₉

• Supply current:

– Operating: 80 mA (MAX.)

– Standby: 100 µA (MAX.)

A₆

A₅

A₄

A₃

A₂

A₁

A₀

39 A₁₀

38 A₁₁

37 A₁₂

36 A₁₃

35 A₁₄

34 A₁₅

• TTL compatible I/O

• Three-state output

• Single +5 V Power supply

• Static operation

A₁₆

CE 11

32 A₂₀

31 GND

30 D₁₅

29 D₇

GND 12

• When the address input at both A₁₉and

A₂₀is high level, outputs become high

impedance irrespective of CE or OE.

D₀

D₈

28 D₁₄

27 D₆

D₁16

• Package:

D₉

D₂

26 D₁₃

25 D₅

24 D₁₂

23 D₄

22 V_CC

42-pin, 600-mil DIP

• Others:

D₁₀19

D₃

– Non programmable

– Not designed or rated as radiation

hardened

D₁₁

5324C00-1

– CMOS process (P type silicon

substrate)

Figure 1. Pin Connections

DESCRIPTION

The LH5324C00 is a 24M-bit mask-programmable

ROM organized as 1,572,864 × 16 bits. It is fabricated

using silicon-gate CMOS process technology.

12 3 4 5 6

中文翻译

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与LH5324C00相关器件

型号	品牌	获取价格	描述	数据表
LH5324C00D	ETC	获取价格	x16 ROM (Mask Programmable)
LH5324P00A	SHARP	获取价格	CMOS 24M (3M x 8/1.5M x 16) Mask-Programmable ROM
LH5324P00N	SHARP	获取价格	MASK ROM, 3MX8, 120ns, CMOS, PDSO44, SOP-44
LH5324P00T	SHARP	获取价格	MASK ROM, 3MX8, 120ns, CMOS, PDSO48, TSOP1-48
LH5324P00TR	SHARP	获取价格	MASK ROM, 3MX8, 120ns, CMOS, PDSO48, REVERSE, TSOP1-48
LH53259	SHARP	获取价格	CMOS 256K (32K x 8) MROM
LH53259D	ETC	获取价格	x8 ROM (Mask Programmable)
LH53259D-15	SHARP	获取价格	MASK ROM, 32KX8, 150ns, CMOS, PDIP28, 0.600 INCH, PLASTIC, DIP-28
LH53259M-15	ETC	获取价格	x8 ROM (Mask Programmable)
LH53259N	ETC	获取价格	x8 ROM (Mask Programmable)