Datasheet
Figure 7. Collector-Em itter Voltage vs. Gate-Em itter Voltage
(TJ = 150 °C)
Figure 8. Capacitance Variation
3
10000
2.5
1000
100
10
CISS
2
IC = 15 A
IC = 10 A
IC = 5 A
1.5
COSS
1
0.5
0
CRSS
(f = 1 MHz)
1
3
4
5
6
7
8
9
10
0
20 40 60 80 100 120 140 160 180 200
Gate-Em itter Voltage, VGE (V)
Collector-Em itter Voltage, VCE (V)
Figure 10. Minim um Open Secondary Latch Current vs.
Tem perature
Figure 9. Gate Threshold Voltage vs. Tem perature
2
30
VTH + 4σ
VCC = 50 V
VGE = 5.0 V
RG = 1000
1.8
VTH
25
1.6
L = 2 mH
1.4
20
VTH - 4σ
1.2
1
15
L = 3 mH
0.8
0.6
0.4
0.2
0
10
L = 6 mH
5
0
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100 125 150 175
Tem perature (°C)
Tem perature (°C)
Figure 11. Typical Open Secondary Latch Current vs.
Tem perature
Figure 12. Inductive Switching Fall Tim e vs. Tem perature
30
12
VCC = 300 V
VGE = 5.0 V
RG = 1000
IC = 10 A
VCC = 50 V
VGE = 5.0 V
RG = 1000
L = 2 mH
25
20
15
10
5
10
8
tf
L = 300 µH
L = 3 mH
6
L = 6 mH
4
td(off)
2
0
0
-50
-25
0
25
50
75
100 125 150 175
-50
-25
0
25
50
75
100
125
150
Tem perature (°C)
Tem perature (°C)
7
Specifications are subject to change without notice.
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Revised: 3/16/2020