September 1992
LF6197 160 ns Monolithic Sample-and-Hold Amplifier
General Description
Features
Y
g
g
Operates with supply voltages from 5V to 18V
CMOS, TTL and ECL compatible logic input
Adjustable inverting or non-inverting gain
Internal hold capacitor
The LF6197 is a monolithic sample-and-hold (S/H) amplifier
that uses a proprietary ‘‘current-multiplexed sample-and-
hold’’ technique to offer extremely high speed while main-
taining 12 bits or higher accuracy. The device is built using
National’s advanced junction-isolated VIPTM (Vertically Inte-
grated PNP) and BI-FETTM process technologies.
Y
Y
Y
Y
High power-supply rejection in both sample and hold
modes
g
The LF6197 acquires a 10V step input to within 0.01% in
160 ns and has 10 mV hold step error when going from
sample to hold mode. The input offset voltage in the sample
mode is typically 3 mV. Even at extremely fast acquisition
speeds, no compromises are made in the droop rate, which
is 0.6 mV/ms. When configured for unity gain, the DC gain
error is 0.03%. The feedthrough attenuation in the hold
mode is 83 dB at DC and 77 dB at 100 kHz.
Key Specifications
Y
Acquisition time (10V step to 0.01%)
160 ns
50 ns
Y
Hold mode settling time (10V step to 0.01%)
Y
Droop rate
0.6 mV/ms
10 mV
Y
Hold step
Y
Aperture jitter
8 ps
rms
Y
Feedthrough attenuation at DC
83 dB
The LF6197 can be externally configured for either inverting
or non-inverting gains, thus offering additional flexibility to
the user. The device includes an internal 10 pF hold capaci-
tor.
Y
Small signal bandwidth
25 MHz
Applications
Y
High-speed data acquisition systems
Y
Automatic test equipment
BI-FETTM and VIPTM are trademarks of National Semiconductor Corporation.
Y
High-speed instrumentation
Y
Replaces expensive hybrid sample-and-hold amplifiers
Block Diagram
Connection Diagram
TL/H/11381–2
Top View
Ordering Information
Industrial
Package
k
k
a
(0 C
§
T
70 C)
§
A
LF6197CCJ
J14A
Ceramic DIP
TL/H/11381–1
C
1995 National Semiconductor Corporation
TL/H/11381
RRD-B30M115/Printed in U. S. A.