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LF45CDT-TR PDF预览

LF45CDT-TR

更新时间: 2024-11-27 20:48:15
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 输出元件调节器
页数 文件大小 规格书
34页 646K
描述
4.5V FIXED POSITIVE LDO REGULATOR, 0.7V DROPOUT, PSSO2, DPAK-3

LF45CDT-TR 技术参数

生命周期:Obsolete零件包装代码:TO-252
包装说明:TO-252, SMSIP3H,.38,90TB针数:3
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.84
可调性:FIXED最大回动电压 1:0.7 V
标称回动电压 1:0.4 V最大绝对输入电压:40 V
最大输入电压:16 V最小输入电压:5.5 V
JESD-30 代码:R-PSSO-G2长度:6.5 mm
最大电网调整率:0.022%最大负载调整率:0.022%
功能数量:1输出次数:1
端子数量:2工作温度TJ-Max:125 °C
工作温度TJ-Min:-40 °C最大输出电流 1:0.5 A
最大输出电压 1:4.68 V最小输出电压 1:4.32 V
标称输出电压 1:4.5 V封装主体材料:PLASTIC/EPOXY
封装代码:TO-252封装等效代码:SMSIP3H,.38,90TB
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL认证状态:Not Qualified
调节器类型:FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR座面最大高度:2.63 mm
子类别:Other Regulators表面贴装:YES
技术:BIPOLAR端子形式:GULL WING
端子节距:2.25 mm端子位置:SINGLE
最大电压容差:4%宽度:6.1 mm
Base Number Matches:1

LF45CDT-TR 数据手册

 浏览型号LF45CDT-TR的Datasheet PDF文件第2页浏览型号LF45CDT-TR的Datasheet PDF文件第3页浏览型号LF45CDT-TR的Datasheet PDF文件第4页浏览型号LF45CDT-TR的Datasheet PDF文件第5页浏览型号LF45CDT-TR的Datasheet PDF文件第6页浏览型号LF45CDT-TR的Datasheet PDF文件第7页 
LF00  
SERIES  
VERY LOW DROP  
VOLTAGE REGULATORS WITH INHIBIT  
VERY LOW DROPOUT VOLTAGE (0.45V)  
VERY LOW QUIESCENT CURRENT (TYP.  
50 µA IN OFF MODE, 500 µA IN ON MODE)  
OUTPUT CURRENT UP TO 500 mA  
LOGIC-CONTROLLED ELECTRONIC  
SHUTDOWN  
PENTAWATT  
OUTPUT VOLTAGES OF 1.25; 1.5; 1.8; 2.5;  
2.7; 3; 3.3; 3.5; 4; 4.5; 4.7; 5; 5.2; 5.5; 6; 8;  
8.5; 9; 12V  
INTERNAL CURRENT AND THERMAL LIMIT  
ONLY 2.2 µF FOR STABILITY  
AVAILABLE IN ± 1% (AB) OR ± 2% (C)  
SELECTION AT 25 °C  
TO-220  
PPAK  
TO-220FP  
SUPPLY VOLTAGE REJECTION: 80db (TYP.)  
TEMPERATURE RANGE: -40 TO 125 °C  
DESCRIPTION  
The LF00 series are very Low Drop regulators  
available in PENTAWATT, TO-220, TO-220FP,  
DPAK and PPAK package and in a wide range of  
output voltages.  
DPAK  
when the device is used as a local regulator, it is  
possible to put a part of the board in standby,  
decreasing the total power consumption. In the  
three terminal configuration the device has the  
same electrical performance, but is fixed in the ON  
state. It requires only a 2.2 µF capacitor for  
stability allowing space and cost saving.  
The very Low Drop voltage (0.45V) and the very  
low quiescent current make them particularly  
suitable for Low Noise, Low Power applications  
and specially in battery powered systems.  
In the 5 pins configuration (PENTAWATT and  
PPAK) a Shutdown Logic Control function is  
available (pin 2, TTL compatible). This means that  
SCHEMATIC DIAGRAM  
August 2003  
1/34  

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