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LF43168JC30 PDF预览

LF43168JC30

更新时间: 2024-09-20 23:46:11
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Digital Filter

LF43168JC30 数据手册

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LF43168  
Dual 8-Tap FIR Filter  
DEVICES INCORPORATED  
FEATURES  
DESCRIPTION  
The LF43168 is a high-speed dual FIR  
filter capable of filtering data at real-  
time video rates. The device contains  
two FIR filters which may be used as  
two separate filters or cascaded to  
form one filter. The input and coeffi-  
cient data are both 10-bits and can be  
in unsigned, twos complement, or  
mixed mode format.  
be implemented. The LF43168 can  
decimate the output data by as much  
as 16:1. When the device is pro-  
grammed to decimate, the number of  
clock cycles available to calculate filter  
taps increases. When configured for  
16:1 decimation, each filter can be  
configured as a 128-tap FIR filter (if  
symmetric coefficient sets are used).  
By cascading these two filters, the  
device can be configured as a 256-tap  
FIR filter.  
66 MHz Data and Computation Rate  
Two Independent 8-Tap or Single  
16-Tap FIR Filters  
10-bit Data and Coefficient Inputs  
32 Programmable Coefficient Sets  
Supports Interleaved Coefficient Sets  
User Programmable Decimation up  
to 16:1  
Maximum of 256 FIR Filter Taps,  
16 x 16 2-D Kernels, or 10 x 20-bit  
Data and Coefficients  
The filter architecture is optimized for  
symmetric coefficient sets. When  
symmetric coefficient sets are used,  
Replaces Harris HSP43168  
each filter can be configured as an 8-tap There is on-chip storage for 32  
Package Styles Available:  
• 84-pin Plastic LCC, J-Lead  
• 100-pin Plastic Quad Flatpack  
FIR filter. If the two filters are cas-  
caded, a 16-tap FIR filter can be  
implemented. When asymmetric  
coefficient sets are used, each filter is  
different sets of coefficients. Each set  
consists of eight coefficients. Access  
to more than one coefficient set  
facilitates adaptive filtering opera-  
configured as a 4-tap FIR filter. If both tions. The 28-bit filter output can be  
filters are cascaded, an 8-tap filter can rounded from 8 to 19 bits.  
LF43168 BLOCK DIAGRAM  
INB9-0  
/
10  
OUT8-0  
9
10  
INA9-0  
5
10  
9
CSEL4-0  
CIN9-0  
A8-0  
WR  
COEFFICIENT  
BANK A  
FILTER  
CELL A  
COEFFICIENT  
BANK B  
FILTER  
CELL B  
CONTROL  
MUX/ADDER  
9
19  
OUT27-9  
OEL  
OEH  
Video Imaging Products  
03/28/2000–LDS.43168-H  
1

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