5秒后页面跳转
LF198H/NOPB PDF预览

LF198H/NOPB

更新时间: 2024-02-29 09:42:39
品牌 Logo 应用领域
德州仪器 - TI 放大器采样保持电路
页数 文件大小 规格书
15页 564K
描述
单片采样保持电路 | LMC | 8 | -55 to 125

LF198H/NOPB 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:SOIC包装说明:CERAMIC, SOIC-14
针数:14Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.24最长采集时间:25 µs
标称采集时间:20 µs放大器类型:SAMPLE AND HOLD CIRCUIT
最大模拟输入电压:11.5 V最小模拟输入电压:-11.5 V
JESD-30 代码:R-CDSO-G14JESD-609代码:e0
湿度敏感等级:1负供电电压上限:-18 V
标称负供电电压 (Vsup):-15 V功能数量:1
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:SOP封装等效代码:SOP14,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:+-15 V
认证状态:Not Qualified采样并保持/跟踪并保持:SAMPLE
筛选级别:MIL-PRF-38535 Class V座面最大高度:2.58 mm
子类别:Sample and Hold Circuits最大压摆率:6.5 mA
供电电压上限:18 V标称供电电压 (Vsup):15 V
表面贴装:YES技术:BIPOLAR
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:6.35 mmBase Number Matches:1

LF198H/NOPB 数据手册

 浏览型号LF198H/NOPB的Datasheet PDF文件第5页浏览型号LF198H/NOPB的Datasheet PDF文件第6页浏览型号LF198H/NOPB的Datasheet PDF文件第7页浏览型号LF198H/NOPB的Datasheet PDF文件第9页浏览型号LF198H/NOPB的Datasheet PDF文件第10页浏览型号LF198H/NOPB的Datasheet PDF文件第11页 
Application Hints (Continued)  
Guarding Technique  
logic input for signal delay, calculate the slope of the wave-  
form at the threshold point to ensure that it is at least  
1.0 V/µs.  
Sampling Dynamic Signals  
Sample error to moving input signals probably causes more  
confusion among sample-and-hold users than any other pa-  
rameter. The primary reason for this is that many users make  
the assumption that the sample and hold amplifier is truly  
locked on to the input signal while in the sample mode. In ac-  
tuality, there are finite phase delays through the circuit creat-  
ing an input-output differential for fast moving signals. In ad-  
dition, although the output may have settled, the hold  
capacitor has an additional lag due to the 300series resis-  
tor on the chip. This means that at the moment the “hold”  
command arrives, the hold capacitor voltage may be some-  
what different than the actual analog input. The effect of  
these delays is opposite to the effect created by delays in the  
logic which switches the circuit from sample to hold. For ex-  
ample, consider an analog input of 20 Vp-p at 10 kHz. Maxi-  
mum dV/dt is 0.6 V/µs. With no analog phase delay and 100  
ns logic delay, one could expect up to (0.1 µs) (0.6V/µs)  
= 60 mVerror if the “hold” signal arrived near maximum dV/dt  
of the input. A positive-going input would give a +60 mV er-  
ror. Now assume a 1 MHz (3 dB) bandwidth for the overall  
analog loop. This generates a phase delay of 160 ns. If the  
hold capacitor sees this exact delay, then error due to analog  
delay will be (0.16 µs) (0.6 V/µs) = −96 mV. Total output error  
is +60 mV (digital) −96 mV (analog) for a total of −36 mV. To  
add to the confusion, analog delay is proportioned to hold  
capacitor value while digital delay remains constant. A family  
of curves (dynamic sampling error) is included to help esti-  
mate errors.  
DS005692-5  
Use 10-pin layout. Guard around Chis tied to output.  
A curve labeled Aperture Time has been included for sam-  
pling conditions where the input is steady during the sam-  
pling period, but may experience a sudden change nearly  
coincident with the “hold” command. This curve is based on  
a 1 mV error fed into the output.  
A second curve, Hold Settling Time indicates the time re-  
quired for the output to settle to 1 mV after the “hold” com-  
mand.  
Digital Feedthrough  
Fast rise time logic signals can cause hold errors by feeding  
externally into the analog input at the same time the amplifier  
is put into the hold mode. To minimize this problem, board  
layout should keep logic lines as far as possible from the  
analog input and the Ch pin. Grounded guarding traces may  
also be used around the input line, especially if it is driven  
from a high impedance source. Reducing high amplitude  
logic signals to 2.5V will also help.  
7
www.national.com  

与LF198H/NOPB相关器件

型号 品牌 描述 获取价格 数据表
LF198H-B PHILIPS Sample and Hold Circuit, 1 Func, MBCY8

获取价格

LF198HSIIB PHILIPS Sample and Hold Circuit, 1 Func, MBCY8

获取价格

LF198J8 Linear IC SAMPLE AND HOLD AMPLIFIER, CDIP8, Sample and Hold Circuit

获取价格

LF198JAN TI LF198JAN Monolithic Sample-and-Hold Circuits

获取价格

LF198JAN_13 TI LF198JAN Monolithic Sample-and-Hold Circuits

获取价格

LF198JAN-SP TI LF198JAN Monolithic Sample-and-Hold Circuits

获取价格

LF198L ETC Sample/Track-and-Hold Amplifier

获取价格

LF198-N TI LF198/LF298/LF398, LF198A/LF398A Monolithic Sample-and-Hold Circuits

获取价格

LF198N8 Linear IC SAMPLE AND HOLD AMPLIFIER, PDIP8, Sample and Hold Circuit

获取价格

LF198QML TI LF198QML Monolithic Sample-and-Hold Circuits

获取价格

LF198QML_14 TI Monolithic Sample-and-Hold Circuits

获取价格

LF198QML-SP TI Monolithic Sample-and-Hold Circuits

获取价格

LF198WG/883 TI LF198QML Monolithic Sample-and-Hold Circuits

获取价格

LF198WG-MLS NSC SAMPLE AND HOLD AMPLIFIER, 20us ACQUISITION TIME, CDSO14, CERAMIC, SOIC-14

获取价格

LF198WG-QMLV TI LF198QML Monolithic Sample-and-Hold Circuits

获取价格

LF1OX ETC PATCHCORD 1/4" ORANGE 1FT

获取价格

LF1PX ETC PATCHCORD 1/4" PURPLE 1FT

获取价格

LF1RX ETC PATCHCORD 1/4" RED 1FT

获取价格

LF1S009 BOTHHAND SINGLE RJ45 CONNECTOR MODULE WITH INTEGRATED 10 BASE T MAGNETICS & FILTERS

获取价格

LF1S021 BOTHHAND SINGLE RJ45 CONNECTOR MODULE WITH INTEGRATED 10 BASE T MAGNETICS & FILTERS

获取价格