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LD3986J2830R-E PDF预览

LD3986J2830R-E

更新时间： 2024-02-24 14:43:12
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 电容器信息通信管理
页数 文件大小 规格书
12页 231K
描述
DUAL ULTRA LOW DROP-LOW NOISE BICMOS VOLTAGE REG. FOR USE WITH VERY LOW ESR OUT. CAPACITORS

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中文翻译

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LD3986J2830R-E 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：BGA
包装说明：VFBGA, BGA8,3X3,20针数：8
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.84
可调性：FIXED最大回动电压 1：0.1 V
标称回动电压 1：0.05 V最大回动电压 2：0.1 V
最大绝对输入电压：6 V最大输入电压：6 V
最小输入电压：2.5 VJESD-30 代码：S-PBGA-B8
长度：1.57 mm最大电网调整率：0.0097%
最大负载调整率：0.0447%功能数量：1
输出次数：2端子数量：8
工作温度TJ-Max：125 °C工作温度TJ-Min：-40 °C
最大输出电流 1：0.15 A最大输出电流 2：0.15 A
最大输出电压 1：2.884 V最小输出电压 1：2.716 V
标称输出电压 1：2.8 V最大输出电压 2：3.09 V
最小输出电压 2：2.91 V标称输出电压 2：3 V
封装主体材料：PLASTIC/EPOXY封装代码：VFBGA
封装等效代码：BGA8,3X3,20封装形状：SQUARE
封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH包装方法：TAPE AND REEL
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
调节器类型：FIXED POSITIVE MULTIPLE OUTPUT LDO REGULATOR座面最大高度：0.715 mm
子类别：Other Regulators表面贴装：YES
技术：BICMOS端子形式：BALL
端子节距：0.5 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED最大电压容差：3%
宽度：1.57 mmBase Number Matches：1

LD3986J2830R-E 数据手册

 浏览型号LD3986J2830R-E的Datasheet PDF文件第2页浏览型号LD3986J2830R-E的Datasheet PDF文件第3页浏览型号LD3986J2830R-E的Datasheet PDF文件第4页浏览型号LD3986J2830R-E的Datasheet PDF文件第5页浏览型号LD3986J2830R-E的Datasheet PDF文件第6页浏览型号LD3986J2830R-E的Datasheet PDF文件第7页 
LD3986  
SERIES  
DUAL ULTRA LOW DROP-LOW NOISE BICMOS VOLTAGE  
REG. FOR USE WITH VERY LOW ESR OUT. CAPACITORS  
■
■
INPUT VOLTAGE FROM 2.5V TO 6V  
STABLE WITH LOW ESR CERAMIC  
CAPACITORS  
■
■
■
ULTRA LOW DROPOUT VOLTAGE (60mV  
TYP. AT 150mA LOAD, 0.4mV TYP. AT 1mA  
LOAD)  
VERY LOW QUIESCENT CURRENT (155µA  
TYP. AT NO LOAD, 290µA TYP. AT 150mA  
LOAD; MAX 2µA IN OFF MODE)  
Flip-Chip  
GUARANTEED OUTPUT CURRENT UP TO  
150mA FOR BOTH OUTPUTS  
■
■
DUAL OUTPUT VOLTAGES  
FAST TURN-ON TIME: TYP. 120µs (C =1µF,  
make it suitable for low power applications and in  
battery powered systems. Regulator ground  
current increases only slightly in dropout, further  
prolonging the battery life. Power supply rejection  
is 50 dB at 1KHz and 40 dB at 10KHz. High power  
supply rejection is maintained down to low input  
voltage levels common to battery operated  
circuits. Shutdown Logic Control function is  
available for each output, this means that when  
the device is used as local regulator, it is possible  
to put a part of the board in standby, decreasing  
the total power consumption. The LD3986 is  
designed to work with low ESR ceramic  
capacitors. Typical applications are in mobile  
phone and similar battery powered wireless  
systems.  
O
C
=10nF AND I =1mA)  
BYP  
O
■
LOGIC-CONTROLLED ELECTRONIC  
SHUTDOWN  
INTERNAL CURRENT AND THERMAL LIMIT  
OUTPUT LOW NOISE VOLTAGE 30µV  
OVER 10Hz to 100KHz  
S.V.R. OF 50dB AT 1KHz, 40dB AT 10KHz  
TEMPERATURE RANGE: -40°C TO 125°C  
■
■
RMS  
■
■
DESCRIPTION  
The LD3986 provides up to 150mA at each output,  
from 2.5V to 6V input voltage. The ultra low  
drop-voltage, low quiescent current and low noise  
Figure 1: Schematic Diagram  
Rev. 3  
1/12  
September 2005  
1234567...12

中文翻译

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