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LD1085DTTR PDF预览

LD1085DTTR

更新时间: 2024-11-14 13:09:15
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 调节器
页数 文件大小 规格书
19页 776K
描述
ADJUSTABLE POSITIVE LDO REGULATOR, 1.3V DROPOUT, PSSO2, DPAK-3

LD1085DTTR 技术参数

生命周期:Obsolete零件包装代码:TO-252
包装说明:TO-252,针数:3
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.66
最大回动电压 1:1.3 VJESD-30 代码:R-PSSO-G2
长度:6.5 mm功能数量:1
端子数量:2最大输出电流 1:3 A
封装主体材料:PLASTIC/EPOXY封装代码:TO-252
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
认证状态:Not Qualified调节器类型:ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR
座面最大高度:2.63 mm表面贴装:YES
端子形式:GULL WING端子节距:2.25 mm
端子位置:SINGLE宽度:6.1 mm
Base Number Matches:1

LD1085DTTR 数据手册

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LD1085  
SERIES  
3A LOW DROP POSITIVE VOLTAGE  
REGULATOR ADJUSTABLE AND FIXED  
I
I
TYPICAL DROPOUT 1.3V (AT 3A)  
THREE TERMINAL ADJUSTABLE OR FIXED  
OUTPUT VOLTAGE 1.5V, 1.8V, 2.5V, 2.85V,  
3.3V, 3.6V, 5V, 8V, 9V, 12V.  
I
I
GUARANTEED OUTPUT CURRENT UP TO  
3A  
OUPUT TOLERANCE ± 1% AT 25°C AND  
± 2% IN FULL TEMPERATURE RANGE  
TO-220  
TO-220FP  
I
I
INTERNAL POWER AND THERMAL LIMIT  
WIDE OPERATING TEMPERATURE RANGE  
-40°C TO 125°C  
I
I
PACKAGE AVAILABLE: TO-220, TO-220FP  
D PAK, D PAK/A  
2
2
2
2
D PAK  
D PAK/A  
PINOUT COMPATIBILITY WITH STANDARD  
ADJUSTABLE VREG  
A 2.85V output version is suitable for SCSI-2  
active termination. Unlike PNP regulators, where  
a part of the output current is wasted as quiescent  
current, the LD1085 quiescent current flows into  
the load, so increase efficiency. Only a 10µF  
minimum capacitor is need for stability.  
DESCRIPTION  
The LD1085 is a LOW DROP Voltage Regulator  
able to provide up to 3A of Output Current.  
Dropout is guaranteed at a maximum of 1.2V at  
the maximum output current, decreasing at lower  
loads. The LD1085 is pin to pin compatible with  
the older 3-terminal adjustable regulators, but has  
better performances in term of drop and output  
tolerance.  
The device is supplied in TO-220, TO-220FP,  
2
2
D PAK and D PAK/A. On chip trimming allows the  
regulator to reach a very tight output voltage  
tolerance, within ±1% at 25°C.  
Figure 1: Schematic Diagram  
Rev. 14  
1/19  
March 2005  

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