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LC7851

更新时间: 2024-09-21 22:40:07
品牌 Logo 应用领域
三洋 - SANYO /
页数 文件大小 规格书
9页 167K
描述
QPSK Demodulation and Audio Signal-Processing IC for Satellite Broadcast Reception

LC7851 数据手册

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Ordering number : EN5691  
CMOS LSI  
LC7851E  
QPSK Demodulation and Audio Signal-Processing IC  
for Satellite Broadcast Reception  
• Ten to 14 bit expansion of audio data during A mode  
broadcasts.  
Overview  
The LC7851E demodulates the QPSK (quadrature phase  
shift keying) modulated audio data broadcast by the  
Japanese BS and CS broadcast satellites and converts that  
data to an analog audio signal. This IC integrates on a  
single chip the audio system signal processing required for  
BS and CS receivers from QPSK demodulation to analog  
audio reproduction. The main functions provided by the  
LC7851E include QPSK demodulation, differential  
decoding conversion, descrambling, deinterleaving, and  
error correction. It also generates a PCM audio signal. The  
PCM audio signal is converted to an analog audio signal  
by on-chip digital filters and A/D converters.  
• Data protection using majority control for the upper bits  
of the audio data during B mode broadcasts  
• Full complement of muting functions  
— Audio suppression provided (bit 16 of the post-  
majority decision control bits)  
— Non-audio signal suppression (bits 2 to 5 of the post-  
majority decision control bits)  
— Forced muting  
— Muting when not synchronized  
— Muting when large numbers of errors are detected  
(modifiable conditions)  
— Channel switching  
— Charged (pay-per-view) program flag muting  
— Mute detection output provided.  
• General-purpose ports (2 input ports and 8 output ports)  
• EIAJ digital audio interface output  
• 8× oversampling digital filters  
• Multi-bit D/A converter (with built-in output operational  
amplifiers)  
• 5 V single-voltage power supply  
Features  
• QPSK demodulator, PCM decoder, digital filters, D/A  
converters, and operational amplifiers integrated on a  
single chip.  
• The number of required external components has been  
reduced and adjustment-free operation achieved in the  
QPSK demodulator by implementing that block as a  
digital circuit on a single chip.  
• QFP (QIP) 64E package  
2
• CPU interface using an I C bus  
• Interface circuits for CORTEC and SkyPort  
descramblers  
Package Dimensions  
unit: mm  
Functions  
• QPSK demodulation  
3195-QFP64E  
[LC7851E]  
• Bit timing clock recovery  
• Differential decoding conversion and parallel-to-serial  
conversion  
• Frame synchronization (forward protection: 8 cycles,  
back protection: 3 cycles): Frame synchronized/not  
synchronized detection flag output provided.  
• Tenth-order M-series descrambling  
• Deinterleaving  
• BCH (63, 56) error correction and dual error detection:  
Single error detected flag output provided.  
• Support for both interpolation and previous data hold  
when a dual error is detected.  
Control bit majority judgment protection every 16  
frames  
SANYO: QIP64E  
• Register data previous value hold when dual errors are  
detected using BCH(7,3)  
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters  
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN  
83097HA(OT) No. 5691-1/9  

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