Datasheet > L4C381JC20

L4C381JC20

更新时间： 2024-01-07 12:11:58

品牌	Logo	应用领域
逻辑 - LOGIC		/
页数	文件大小	规格书
12页	87K
描述
16-bit Cascadable ALU

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L4C381JC20 数据手册

L4C381

DEVICES INCORPORATED

16-bit Cascadable ALU

L4C381

16-bit Cascadable ALU

DEVICES INCORPORATED

FEATURES

DESCRIPTION

The L4C381 is a flexible, high speed,

cascadable 16-bit Arithmetic and

Logic Unit. It combines four 381-type

4-bit ALUs, a look-ahead carry

generator, and miscellaneous interface

logic — all in a single 68-pin package.

While containing new features to

support high speed pipelined architec-

tures and single 16-bit bus configura-

tions, the L4C381 retains full perform-

ance and functional compatibility with

the bipolar ’381 designs.

the end of this data sheet for more

information.

❑ High-Speed (15ns), Low Power

16-bit Cascadable ALU

❑ ImplementsAdd,Subtract,Accumu-

late, Two’s Complement, Pass, and

LogicOperations

ARCHITECTURE

The L4C381 operates on two 16-bit

operands (A and B) and produces a

16-bit result (F). Three select lines

control the ALU and provide 3

❑ All Registers Have a Bypass Path

for Complete Flexibility

❑ 68-pin PLCC, J-Lead

arithmetic, 3 logical, and 2 initializa-

tion functions. Full ALU status is

provided to support cascading to

longer word lengths. Registers are

provided on both the ALU inputs and

the output, but these may be bypassed

under user control. An internal

feedback path allows the registered

ALU output to be routed to one of the

ALU inputs, accommodating chain

operations and accumulation. Fur-

thermore, the A or B input can be

forced to Zero allowing unary func-

tions on either operand.

The L4C381 can be cascaded to

perform 32-bit or greater operations.

See “Cascading the L4C381” toward

L4C381 BLOCK DIAGRAM

15-A

B15-B

ENA

A REGISTER

B REGISTER

ENB

ALU OPERATIONS

The S2–S0 lines specify the operation

to be performed. The ALU functions

and their select codes are shown in

Table 1.

FTAB

OSA

OSB

The two functions, B minus A and

A minus B, can be achieved by setting

the carry input of the least significant

slice and selecting codes 001 and 010

respectively.

P, G, C16

OVF, Z

S2-S0, C0

ALU

TABLE 1. ALU FUNCTIONS

RESULT REGISTER

ENF

S2-S0

000

001

010

011

100

101

110

111

FUNCTION

CLEAR (F = 00 • • • 00)

NOT(A) + B

FTF

A + NOT(B)

A + B

A XOR B

A OR B

A AND B

CLK

TO ALL REGISTERS

15-F0

PRESET (F = 11 • • • 11)

Arithmetic Logic Units

08/16/2000–LDS.381-P

12 3 4 5 6 7...12

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