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L3845D1013TR PDF预览

L3845D1013TR

更新时间: 2024-11-25 21:10:47
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 电信光电二极管电信集成电路
页数 文件大小 规格书
8页 482K
描述
SPECIALTY TELECOM CIRCUIT, PDSO8, SO-8

L3845D1013TR 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:8
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.1JESD-30 代码:R-PDSO-G8
JESD-609代码:e0长度:4.9 mm
功能数量:1端子数量:8
最高工作温度:70 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
座面最大高度:1.75 mm表面贴装:YES
电信集成电路类型:TELECOM CIRCUIT温度等级:OTHER
端子面层:TIN LEAD端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
Base Number Matches:1

L3845D1013TR 数据手册

 浏览型号L3845D1013TR的Datasheet PDF文件第2页浏览型号L3845D1013TR的Datasheet PDF文件第3页浏览型号L3845D1013TR的Datasheet PDF文件第4页浏览型号L3845D1013TR的Datasheet PDF文件第5页浏览型号L3845D1013TR的Datasheet PDF文件第6页浏览型号L3845D1013TR的Datasheet PDF文件第7页 
L3845  
®
TRUNK INTERFACE  
ON CHIP POLARITY GUARD  
MEETS DC LINE CHARACTERISTICS OF  
EITHER CCITT AND EIA RS 464 SPECS  
PULSE FUNCTION  
HIGH AC IMPEDANCE  
OFF HOOK-STATUS DETECTION OUTPUT  
LOW EXTERNAL COMPONENT COUNT  
Minidip  
SO8  
SO20W  
(12+4+4)  
DESCRIPTION  
The circuit provides DC loop termination for ana-  
log trunk lines.  
ORDERING NUMBERS:  
L3845B  
L3845D  
L3845-20  
The V-I characteristics is equivalent to a fixed  
voltage drop (zener like characteristic) in series  
with an external resistance that determines the  
slope of the DC characteristic.  
An external low voltage electrolytic capacitor  
causes the circuit to exhibit a very high imped-  
ance to all AC signal above a minimum frequency  
that is determined by the capacitor itself and by a  
20 K nominal resistor integrated on the chip.  
The Off-Hook status is detected all the time a  
typic of 8 mA is flowing into the circuit. In this con-  
dition a constant current generator is activated to  
supply an external device (typically an optocou-  
pler) withouaffecting the AC characteristic of the  
circuit.  
When Pulse Dialing is required the PULSE input  
(3) connected to V- causes the device to re-  
duce the fixed DC voltage drop and to exhibit a  
pure resistive impedance equal to the external re-  
sistor.  
BLOCK DIAGRAM  
8
1
V+  
IN1  
3
PULSE  
DC LINE  
TERMINATION  
POLARITY  
GUARD  
OF HOOK  
4
DETECTION  
CIRCUIT  
HD0  
7
IN2  
5
6
2
ACT  
DCT  
V-  
R2  
R3  
C1  
S2  
R1  
S1  
D96TL263  
September 2003  
1/8  
This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.  

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