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KSZ9692XPBTR PDF预览

KSZ9692XPBTR

更新时间: 2024-11-21 20:56:27
品牌 Logo 应用领域
美国微芯 - MICROCHIP 时钟外围集成电路
页数 文件大小 规格书
48页 944K
描述
Microprocessor Circuit

KSZ9692XPBTR 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:PBGA-400Reach Compliance Code:compliant
风险等级:5.61其他特性:ALSO REQUIRES 3.3 V I/O SUPPLY
最大时钟频率:250 MHz外部数据总线宽度:16
JESD-30 代码:S-PBGA-B400长度:27 mm
端子数量:400最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装等效代码:BGA400,27X27,50
封装形状:SQUARE封装形式:GRID ARRAY
座面最大高度:2.46 mm最大供电电压:1.365 V
最小供电电压:1.235 V标称供电电压:1.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:BALL
端子节距:1.27 mm端子位置:BOTTOM
宽度:27 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR CIRCUIT
Base Number Matches:1

KSZ9692XPBTR 数据手册

 浏览型号KSZ9692XPBTR的Datasheet PDF文件第2页浏览型号KSZ9692XPBTR的Datasheet PDF文件第3页浏览型号KSZ9692XPBTR的Datasheet PDF文件第4页浏览型号KSZ9692XPBTR的Datasheet PDF文件第5页浏览型号KSZ9692XPBTR的Datasheet PDF文件第6页浏览型号KSZ9692XPBTR的Datasheet PDF文件第7页 
KSZ9692PB/KSZ9692XPB  
Integrated Gigabit Networking and Communications Controller  
• Peripherals  
Highlights  
- Four high-speed UART ports up to 5 Mbps  
• ARM® 922T High-Performance Processor Core  
- 250 MHz ARM 922T RISC processor core  
- 8KB I-cache and 8KB D-cache  
- Two programmable 32-bit timers with watch-  
dog timer capability  
- Interrupt Controller  
- Twenty GPIO ports  
- Configurable Memory Management Unit  
(MMU) for Linux and WinCE  
- One shared SPI/I2C interface  
- One I2S port  
• Memory Controller  
- 8/16-bit external bus interface for FLASH,  
ROM, SRAM, and external I/O  
• Debugging  
- ARM9 JTAG debug interface  
- JTAG Boundary Scan Support  
• Power Management  
- NAND FLASH controller with boot option  
- 200MHz  
- 32-bit DDR controller  
- CPU and system clock speed step-down  
options  
- Two JEDEC Specification JESD82-1-compli-  
ant differential clock drivers for a glueless  
DDR interface solution  
- Ethernet port Wake-on-LAN  
- DDR and PCI power down  
• Operating Voltage  
• Ethernet Interfaces  
- Two Gb (10/100/1000 Mbps) MACs  
- MII or RGMII interface  
- 1.3V power for core  
- 3.3V power for I/O  
- Fully compliant with IEEE 802.3 Ethernet  
standards  
- 2.5V or 2.6V power for DDR memory inter-  
face  
• PCI Interface  
• Reference Hardware and Software Evaluation Kit  
- Hardware Evaluation Kit  
- Version PCI 2.3  
- 32-bit 33/66 MHz  
- Software Evaluation Kit includes WinCE BSP,  
Open WRT BSP, Linux based SOHO Router  
packages  
- Integrated PCI Arbiter supports three external  
masters for KSZ9692PB and one external  
master for KSZ9692XPB  
- Configurable as Host bridge or Guest device  
Applications  
- Glueless Support for mini-PCI or CardBus  
devices  
• Enhanced residential gateways  
• High-end printer servers  
• Dual High-Speed USB 2.0 Interfaces  
- Two USB2.0 ports with integrated PHY  
• USB device servers  
- Can be configured as 2-port host, or host +  
device  
• IP-based multimedia systems  
• Voice-over-Internet Protocol (VoIP) systems  
• Set-top box  
• SDIO/SD Host Controller (for KSZ9692PB only)  
- Meets SD Host Controller Standard Specifi-  
cation Version 1.0  
• Industrial control  
• Wireless Access Points or Mesh Nodes  
- Meets SDIO card specification Version 1.0  
• DMA Controllers  
- Dedicated DMA channels for PCI, USB,  
SDIO and Ethernet ports.  
2008-2019 Microchip Technology Inc.  
DS00003073A-page 1  

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