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KM48C2004CK-5 PDF预览

KM48C2004CK-5

更新时间: 2023-07-15 00:00:00
品牌 Logo 应用领域
三星 - SAMSUNG 动态存储器光电二极管
页数 文件大小 规格书
21页 386K
描述
EDO DRAM, 2MX8, 50ns, CMOS, PDSO28, 0.300 INCH, PLASTIC, SOJ-28

KM48C2004CK-5 数据手册

 浏览型号KM48C2004CK-5的Datasheet PDF文件第2页浏览型号KM48C2004CK-5的Datasheet PDF文件第3页浏览型号KM48C2004CK-5的Datasheet PDF文件第4页浏览型号KM48C2004CK-5的Datasheet PDF文件第5页浏览型号KM48C2004CK-5的Datasheet PDF文件第6页浏览型号KM48C2004CK-5的Datasheet PDF文件第7页 
KM48C2004C, KM48C2104C  
KM48V2004C, KM48V2104C  
CMOS DRAM  
2M x 8Bit CMOS Dynamic RAM with Extended Data Out  
DESCRIPTION  
This is a family of 2,097,152 x 8 bit Extended Data Out CMOS DRAMs. Extended Data Out Mode offers high speed random access of  
memory cells within the same row, so called Hyper Page Mode. Power supply voltage (+5.0V or +3.3V), refresh cycle (2K Ref. or 4K  
Ref.), access time (-5 or -6), power consumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of this  
family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh  
operation is available in L-version. This 2Mx8 EDO Mode DRAM family is fabricated using Samsung¢s advanced CMOS process to real-  
ize high band-width, low power consumption and high reliability. It may be used as graphic memory unit for microcomputer and personal  
computer.  
FEATURES  
Part Identification  
• Extended Data Out Mode operation  
(Fast page mode with Extended Data Out)  
• CAS-before-RAS refresh capability  
- KM48C2004C/C-L (5V, 4K Ref.)  
• RAS-only and Hidden refresh capability  
- KM48C2104C/C-L (5V, 2K Ref.)  
• Self-refresh capability (L-ver only)  
- KM48V2004C/C-L (3.3V, 4K Ref.)  
- KM48V2104C/C-L (3.3V, 2K Ref.)  
• Fast parallel test mode capability  
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs  
• Early Write or output enable controlled write  
• JEDEC Standard pinout  
Active Power Dissipation  
Unit : mW  
5V  
3.3V  
• Available in Plastic SOJ and TSOP(II) packages  
• Single +5V±10% power supply (5V product)  
• Single +3.3V±0.3V power supply (3.3V product)  
Speed  
4K  
2K  
396  
360  
4K  
2K  
-5  
-6  
324  
288  
495  
440  
605  
550  
FUNCTIONAL BLOCK DIAGRAM  
Refresh Cycles  
Part  
VCC  
Refresh  
cycle  
Refresh period  
RAS  
CAS  
W
Vcc  
Vss  
Control  
Clocks  
NO.  
Normal  
L-ver  
VBB Generator  
C2004C  
V2004C  
C2104C  
V2104C  
5V  
3.3V  
5V  
4K  
2K  
64ms  
Data in  
128ms  
Buffer  
Row Decoder  
Refresh Timer  
Refresh Control  
Refresh Counter  
32ms  
3.3V  
DQ0  
to  
DQ7  
Memory Array  
2,097,152 x8  
Cells  
Performance Range  
A0-A11  
(A0 - A10) *1  
A0 - A8  
(A0 - A9)*1  
Row Address Buffer  
Col. Address Buffer  
Speed  
-5  
Remark  
tRAC  
50ns  
60ns  
tCAC  
tRC  
tHPC  
Data out  
Buffer  
13ns  
84ns  
20ns 5V/3.3V  
Column Decoder  
OE  
-6  
15ns 104ns 25ns 5V/3.3V  
Note) *1 : 2K Refresh  
SAMSUNG ELECTRONICS CO., LTD. reserves the right to  
change products and specifications without notice.  

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