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KM416V256DJ-6 PDF预览

KM416V256DJ-6

更新时间: 2024-01-05 00:45:26
品牌 Logo 应用领域
三星 - SAMSUNG 动态存储器光电二极管内存集成电路
页数 文件大小 规格书
35页 801K
描述
256KX16 FAST PAGE DRAM, 60ns, PDSO40, 0.400 INCH, SOJ-40

KM416V256DJ-6 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOJ包装说明:0.400 INCH, SOJ-40
针数:40Reach Compliance Code:unknown
风险等级:5.92访问模式:FAST PAGE
最长访问时间:60 ns其他特性:RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH
I/O 类型:COMMONJESD-30 代码:R-PDSO-J40
JESD-609代码:e0长度:26.04 mm
内存密度:4194304 bit内存集成电路类型:FAST PAGE DRAM
内存宽度:16功能数量:1
端口数量:1端子数量:40
字数:262144 words字数代码:256000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:256KX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:SOJ封装等效代码:SOJ40,.44
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
电源:3.3 V认证状态:Not Qualified
刷新周期:512座面最大高度:3.76 mm
自我刷新:NO最大待机电流:0.0005 A
子类别:DRAMs最大压摆率:0.09 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:DUAL
宽度:10.16 mmBase Number Matches:1

KM416V256DJ-6 数据手册

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KM416C256D, KM416V256D  
CMOS DRAM  
256K x 16Bit CMOS Dynamic RAM with Fast Page Mode  
DESCRIPTION  
This is a family of 262,144 x 16 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells  
within the same row. Power supply voltage (+5.0V or +3.3V), access time (-5,-6,-7), power consumption(Normal or Low power) and  
package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and  
Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 256Kx16 fast page mode DRAM family is  
fabricated using Samsung¢s advanced CMOS process to realize high band-width, low power consumption and high reliability.  
It may be used as graphic memory unit for microcomputer, personal computer and portable machines.  
• Fast Page Mode operation  
• 2 CAS Byte/Wrod Read/Write operation  
FEATURES  
• CAS-before-RAS refresh capability  
• Part Identification  
• RAS-only and Hidden refresh capability  
- KM416C256D/DL (5V, 512 Ref.)  
- KM416V256D/DL (3.3V, 512 Ref.)  
• Self-refresh capability (L-ver only)  
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs  
• Early Write or output enable controlled write  
• JEDEC Standard pinout  
ActivePowerDissipation  
Unit : mW  
• Available in 40-pin SOJ 400mil and44(40)-pin  
TSOP(II) 400mil packages  
Speed  
-5  
3.3V(512 Ref.)  
5V(512 Ref.)  
-
605  
495  
440  
• Triple +5V±10% power supply(5V product)  
• Triple +3.3V±0.3V power supply(3.3V product)  
-6  
325  
290  
-7  
Refresh Cycles  
FUNCTIONAL BLOCK DIAGRAM  
Part  
VCC  
Refresh  
cycle  
Refresh period  
NO.  
Normal  
L-ver  
RAS  
UCAS  
LCAS  
W
Vcc  
Vss  
Control  
Clocks  
C256D  
5V  
VBB Generator  
512  
8ms  
128ms  
V256D 3.3V  
Lower  
Data in  
Buffer  
DQ0  
to  
Row Decoder  
Refresh Timer  
Refresh Control  
Performance Range  
DQ7  
Lower  
Data out  
Buffer  
Speed  
-5  
Remark  
5V only  
tRAC  
50ns  
60ns  
70ns  
tCAC  
15ns  
15ns  
20ns  
tRC  
tPC  
35ns  
Memory Array  
262,144 x16  
Cells  
90ns  
10ns  
OE  
Refresh Counter  
Row Address Buffer  
Col. Address Buffer  
Upper  
Data in  
Buffer  
-6  
40ns 5V/3.3V  
DQ8  
to  
DQ15  
-7  
130ns 45ns 5V/3.3V  
Upper  
Data out  
Buffer  
A0~A8  
Column Decoder  
SAMSUNG ELECTRONICS CO., LTD. reserves the right to  
change products and specifications without notice.  

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KM416V256DT-6 SAMSUNG

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256KX16 FAST PAGE DRAM, 60ns, PDSO40, 0.400 INCH, TSOP2-44/40
KM416V256DT-7 SAMSUNG

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