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KA7815R PDF预览

KA7815R

更新时间: 2024-11-25 19:25:35
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 输出元件调节器
页数 文件大小 规格书
30页 221K
描述
Fixed Positive Standard Regulator, 15VBIPolar, PSFM3, DPAK-3

KA7815R 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TO-252包装说明:TO-220, SMSIP3H,.38,90TB
针数:3Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.39可调性:FIXED
标称回动电压 1:2 V最大绝对输入电压:35 V
最大输入电压:30 V最小输入电压:17.5 V
JESD-30 代码:R-PSFM-T3JESD-609代码:e0
最大电网调整率:0.3%最大负载调整率:0.3%
功能数量:1输出次数:1
端子数量:3工作温度TJ-Max:125 °C
工作温度TJ-Min:最大输出电流 1:1 A
最大输出电压 1:15.75 V最小输出电压 1:14.25 V
标称输出电压 1:15 V封装主体材料:PLASTIC/EPOXY
封装代码:TO-220封装等效代码:SMSIP3H,.38,90TB
封装形状:RECTANGULAR封装形式:FLANGE MOUNT
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
调节器类型:FIXED POSITIVE SINGLE OUTPUT STANDARD REGULATOR子类别:Other Regulators
表面贴装:NO技术:BIPOLAR
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.3 mm端子位置:SINGLE
处于峰值回流温度下的最长时间:NOT SPECIFIED最大电压容差:4%
Base Number Matches:1

KA7815R 数据手册

 浏览型号KA7815R的Datasheet PDF文件第2页浏览型号KA7815R的Datasheet PDF文件第3页浏览型号KA7815R的Datasheet PDF文件第4页浏览型号KA7815R的Datasheet PDF文件第5页浏览型号KA7815R的Datasheet PDF文件第6页浏览型号KA7815R的Datasheet PDF文件第7页 
www.fairchildsemi.com  
KA78XX/KA78XXA  
3-terminal 1A positive voltage regulator  
Features  
Description  
• Output Current up to 1A  
• Output Voltages of 5, 6, 8, 9, 10, 11, 12, 15, 18, 24V  
• Thermal Overload Protection  
• Short Circuit Protection  
• Output Transistor Safe Operating area Protection  
The KA78XX/KA78XXA series of three-terminal positive  
regulator are available in the TO-220/D-PAK package and  
with several fixed output voltages, making them useful in a  
wide range of applications. Each type employs internal cur-  
rent limiting, thermal shut-down and safe operating area pro-  
tection, making it essentially indestructible. If adequate heat  
sinking is provided, they can deliver over 1A output current.  
Although designed primarily as fixed voltage regulators,  
these devices can be used with external components to  
obtain adjustable voltages and currents.  
TO-220  
1
D-PAK  
1
1. Input 2. GND 3. Output  
Internal Block Digram  
Rev. 5.0  
©2000 Fairchild Semiconductor International  

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