Datasheet > K4S643233H-HC1H

K4S643233H-HC1H

更新时间： 2024-11-23 15:36:03

品牌	Logo	应用领域
三星 - SAMSUNG		时钟动态存储器内存集成电路
页数	文件大小	规格书
12页	141K
描述
Synchronous DRAM, 2MX32, 7ns, CMOS, PBGA90

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技术参数
数据手册

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K4S643233H-HC1H 技术参数

是否Rohs认证：	符合	生命周期：	Active
Reach Compliance Code：	compliant	风险等级：	5.75
最长访问时间：	7 ns	最大时钟频率 (fCLK)：	105 MHz
I/O 类型：	COMMON	交错的突发长度：	1,2,4,8
JESD-30 代码：	R-PBGA-B90	内存密度：	67108864 bit
内存集成电路类型：	SYNCHRONOUS DRAM	内存宽度：	32
端子数量：	90	字数：	2097152 words
字数代码：	2000000	最高工作温度：	70 °C
最低工作温度：	-25 °C	组织：	2MX32
输出特性：	3-STATE	封装主体材料：	PLASTIC/EPOXY
封装代码：	FBGA	封装等效代码：	BGA90,9X15,32
封装形状：	RECTANGULAR	封装形式：	GRID ARRAY, FINE PITCH
电源：	3/3.3 V	认证状态：	Not Qualified
刷新周期：	4096	连续突发长度：	1,2,4,8,FP
最大待机电流：	0.0005 A	子类别：	DRAMs
最大压摆率：	0.12 mA	表面贴装：	YES
技术：	CMOS	温度等级：	OTHER
端子形式：	BALL	端子节距：	0.8 mm
端子位置：	BOTTOM	Base Number Matches：	1

K4S643233H-HC1H 数据手册

K4S643233H - F(H)E/N/G/C/L/F

Mobile-SDRAM

512K x 32Bit x 4 Banks Mobile SDRAM in 90FBGA

FEATURES

GENERAL DESCRIPTION

• 3.0V & 3.3V power supply.

The K4S643233H is 67,108,864 bits synchronous high data

rate Dynamic RAM organized as 4 x 524,288 words by 32 bits,

fabricated with SAMSUNG’s high performance CMOS technol-

ogy. Synchronous design allows precise cycle control with the

use of system clock and I/O transactions are possible on every

clock cycle. Range of operating frequencies, programmable

burst lengths and programmable latencies allow the same

device to be useful for a variety of high bandwidth and high per-

formance memory system applications.

• LVCMOS compatible with multiplexed address.

• Four banks operation.

• MRS cycle with address key programs.

-. CAS latency (1, 2 & 3).

-. Burst length (1, 2, 4, 8 & Full page).

-. Burst type (Sequential & Interleave).

• EMRS cycle with address key programs.

• All inputs are sampled at the positive going edge of the system

clock.

• Burst read single-bit write operation.

• Special Function Support.

-. PASR (Partial Array Self Refresh).

-. Internal TCSR (Temperature Compensated Self Refresh)

• DQM for masking.

• Auto refresh.

• 64ms refresh period (4K cycle).

• Commercial Temperature Operation (-25°C ~ 70°C).

• Extended Temperature Operation (-25°C ~ 85°C).

• 90Balls FBGA with 0.8mm ball pitch

( -FXXX : Leaded, -HXXX : Lead Free).

ORDERING INFORMATION

Part No.

Max Freq.

Interface

Package

K4S643233H-F(H)E/N/G/C/L/F60

K4S643233H-F(H)E/N/G/C/L/F75

K4S643233H-F(H)E/N/G/C/L/F1H

K4S643233H-F(H)E/N/G/C/L/F1L

166MHz(CL=3)

133MHz(CL=3)

105MHz(CL=2)

90 FBGA

Leaded (Lead Free)

LVCMOS

105MHz(CL=3)^*1

- F(H)E/N/G : Normal / Low / Low Power, Extended Temperature(-25°C ~ 85°C)

- F(H)C/L/F : Normal / Low / Low Power, Commercial Temperature(-25°C ~ 70°C)

NOTES :

1. In case of 40MHz Frequency, CL1 can be supported.

2. Samsung are not designed or manufactured for use in a device or system that is used under circumstance in which human life is potentially at stake.

Please contact to the memory marketing team in samsung electronics when considering the use of a product contained herein for any specific

purpose, such as medical, aerospace, nuclear, military, vehicular or undersea repeater use.

February 2004

12 3 4 5 6 7...12

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与K4S643233H-HC1H相关器件

型号	品牌	获取价格	描述	数据表
K4S643233H-HC1L	SAMSUNG	获取价格	Synchronous DRAM, 2MX32, 7ns, CMOS, PBGA90
K4S643233H-HC1L0	SAMSUNG	获取价格	Synchronous DRAM, 2MX32, 7ns, CMOS, PBGA90, LEAD FREE, FBGA-90
K4S643233H-HC600	SAMSUNG	获取价格	Synchronous DRAM, 2MX32, 5.4ns, CMOS, PBGA90, LEAD FREE, FBGA-90
K4S643233H-HC75	SAMSUNG	获取价格	Synchronous DRAM, 2MX32, 6ns, CMOS, PBGA90
K4S643233H-HE1H	SAMSUNG	获取价格	Synchronous DRAM, 2MX32, 7ns, CMOS, PBGA90
K4S643233H-HE1L	SAMSUNG	获取价格	Synchronous DRAM, 2MX32, 7ns, CMOS, PBGA90
K4S643233H-HE1L0	SAMSUNG	获取价格	Synchronous DRAM, 2MX32, 7ns, CMOS, PBGA90, LEAD FREE, FBGA-90
K4S643233H-HE60	SAMSUNG	获取价格	Synchronous DRAM, 2MX32, 5.4ns, CMOS, PBGA90
K4S643233H-HF1H	SAMSUNG	获取价格	Synchronous DRAM, 2MX32, 7ns, CMOS, PBGA90
K4S643233H-HF1H0	SAMSUNG	获取价格	Synchronous DRAM, 2MX32, 7ns, CMOS, PBGA90, LEAD FREE, FBGA-90

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