生命周期: | Obsolete | 零件包装代码: | TSOP2 |
包装说明: | TSOP2, | 针数: | 54 |
Reach Compliance Code: | unknown | ECCN代码: | EAR99 |
HTS代码: | 8542.32.00.02 | 风险等级: | 5.29 |
Is Samacsys: | N | 访问模式: | FOUR BANK PAGE BURST |
最长访问时间: | 6 ns | 其他特性: | AUTO/SELF REFRESH |
JESD-30 代码: | R-PDSO-G54 | 长度: | 22.22 mm |
内存密度: | 134217728 bit | 内存集成电路类型: | SYNCHRONOUS DRAM |
内存宽度: | 4 | 功能数量: | 1 |
端口数量: | 1 | 端子数量: | 54 |
字数: | 33554432 words | 字数代码: | 32000000 |
工作模式: | SYNCHRONOUS | 最高工作温度: | 70 °C |
最低工作温度: | 组织: | 32MX4 | |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | TSOP2 |
封装形状: | RECTANGULAR | 封装形式: | SMALL OUTLINE, THIN PROFILE |
认证状态: | Not Qualified | 座面最大高度: | 1.2 mm |
自我刷新: | YES | 最大供电电压 (Vsup): | 3.6 V |
最小供电电压 (Vsup): | 3 V | 标称供电电压 (Vsup): | 3.3 V |
表面贴装: | YES | 技术: | CMOS |
温度等级: | COMMERCIAL | 端子形式: | GULL WING |
端子节距: | 0.8 mm | 端子位置: | DUAL |
宽度: | 10.16 mm | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
K4S280432A-TL10 | SAMSUNG |
获取价格 |
Synchronous DRAM, 32MX4, 7ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54 | |
K4S280432A-TL1L | SAMSUNG |
获取价格 |
Synchronous DRAM, 32MX4, 6ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54 | |
K4S280432A-TL1L0 | SAMSUNG |
获取价格 |
Synchronous DRAM, 32MX4, 6ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54 | |
K4S280432A-TL750 | SAMSUNG |
获取价格 |
Synchronous DRAM, 32MX4, 5.4ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54 | |
K4S280432A-TL80 | SAMSUNG |
获取价格 |
Synchronous DRAM, 32MX4, 6ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54 | |
K4S280432A-TL800 | SAMSUNG |
获取价格 |
Synchronous DRAM, 32MX4, 6ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54 | |
K4S280432B | SAMSUNG |
获取价格 |
128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL | |
K4S280432B-TC/L10 | SAMSUNG |
获取价格 |
128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL | |
K4S280432B-TC/L1H | SAMSUNG |
获取价格 |
128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL | |
K4S280432B-TC/L1L | SAMSUNG |
获取价格 |
128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL |