Datasheet > K24C020-DCTG-A

K24C020-DCTG-A

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
伊泰克 - ESTEK		光电二极管
页数	文件大小	规格书
13页	1114K
描述
8-lead PDIP, 8-lead SOP and 8-lead TSSOP Packages

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数据手册

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K24C020-DCTG-A 数据手册

24C02 / 24C04 / 24C08 / 24C16

Read Operations

RANDOM READ: A random read requires a "dummy" byte write sequence to load in the data word address. Once the

device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller

must generate another start condition. The microcontroller now initiates a current address read by sending a device

address with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the

data word. The microcontroller does not respond with a "0" but does generate a following stop condition (see Figure 8

on page 8).

SEQUENTIAL READ: Sequential reads are initiated by either a current address read or a random address read. After

the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an

acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When

the memory address limit is reached, the data word address will "roll over" and the sequential read will continue. The

sequential read operation is terminated when the microcontroller does not respond with a "0" but does generate a

following stop condition (see Figure 9 on page 8).

Figure 4: Device Address

MSB

R/W

LSB

R/W

16K

Figure 5: Byte Write

DEVICE

ADDRESS

WORD

ADDRESS

DATA

SDA LINE

L R AM

S / C S

BWKB

L A

B K

Figure 6: Page Write

DEVICE

ADDRESS

WORD

ADDRESS(n)

DATA( n )

DATA( n+1 )

DATA( n+x )

SDA LINE

L R AM

S / C S

BWKB

L A

B K

BEIJING ESTEK ELECTRONICS CO.,LTD

1...4 5 678 9 10...13

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