Datasheet > K10P48M50SF0

K10P48M50SF0

更新时间： 2022-11-11 19:19:06

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飞思卡尔 - FREESCALE		/
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描述
K10 Sub-Family

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K10P48M50SF0 数据手册

Peripheral operating requirements and behaviors

Table 37. I2S/SAI slave mode timing in VLPR, VLPW, and VLPS modes (full voltage range)

(continued)

Num.

S12

Characteristic

Min.

45%

Max.

55%

Unit

MCLK period

I2S_TX_BCLK/I2S_RX_BCLK pulse width high/low

(input)

S13

S14

I2S_TX_FS/I2S_RX_FS input setup before

I2S_TX_BCLK/I2S_RX_BCLK

—

I2S_TX_FS/I2S_RX_FS input hold after

I2S_TX_BCLK/I2S_RX_BCLK

S15

S16

S17

S18

S19

I2S_TX_BCLK to I2S_TXD/I2S_TX_FS output valid

I2S_TX_BCLK to I2S_TXD/I2S_TX_FS output invalid

I2S_RXD setup before I2S_RX_BCLK

—

I2S_RXD hold after I2S_RX_BCLK

I2S_TX_FS input assertion to I2S_TXD output valid¹

—

1. Applies to first bit in each frame and only if the TCR4[FSE] bit is clear

S11

S12

I2S_TX_BCLK/

S12

I2S_RX_BCLK (input)

S15

S16

I2S_TX_FS/

I2S_RX_FS (output)

S13

S19

S14

I2S_TX_FS/

I2S_RX_FS (input)

S15

S16

S15

S16

I2S_TXD

I2S_RXD

S17

S18

Figure 22. I2S/SAI timing — slave modes

6.9 Human-machine interfaces (HMI)

6.9.1 TSI electrical specifications

Table 38. TSI electrical specifications

Symbol Description

V_DDTSIOperating voltage

C_ELETarget electrode capacitance range

Min.

Typ.

Max.

Unit

Notes

1.71

—

3.6

500

Table continues on the next page...

K10 Sub-Family Data Sheet, Rev. 4 5/2012.

Freescale Semiconductor, Inc.

1...49 50 515253 54 55...59

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