Datasheet > JCLNLATN@50.000MHZ

JCLNLATN@50.000MHZ

更新时间： 2023-08-15 00:00:00

品牌	Logo	应用领域
美高森美 - MICROSEMI		/
页数	文件大小	规格书
10页	200K
描述
CMOS/TTL Output Clock Oscillator, 1.024MHz Min, 155.52MHz Max, 50MHz Nom, HERMETIC SEALDED, J-LEADED, CERAMIC PACKAGE-6

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J-Type Voltage Controlled Crystal Oscillator

Qualification Conformance

The CMOS J-type family has undergone the following Mil-Std qualification:

Table 3. Environmental Compliance

Parameter

Conditions

Mechanical Shock

Mechanical Vibration

Solderability

Gross and Fine Leak

Resistance to Solvents

MIL-STD-883, Method 2002

MIL-STD-883, Method 2007

MIL-STD-883, Method 2003

MIL-STD-883, Method 1014

MIL-STD-883, Method 2015

Handling Precautions

Although ESD protection circuitry has been designed into the the J-type, proper precautions should be

taken when handling and mounting. VI employs a human body model and a charged-device model

(CDM) for ESD susceptibility testing and design protection evaluation. ESD thresholds are dependent on

the circuit parameters used to define the model. Although no industry wide standard has been adopted

for the CDM, a standard HBM of resistance = 1.5Kohms and capacitance = 100pF is widely used and

therefore can be used for comparison purposes.

Table 4. ESD Ratings

Model

Minimum

1500 V

Human Body Model (HBM)

Charged Device Model (CDM)

Reflow Profile (IPC/JEDEC J-STD-020C)

Parameter

Symbol

Value

PreHeat Time

t _S

60 sec Min, 180 sec Max

3 ^oC/sec Max

Ramp Up

R _UP

t _L

Time Above 217 ^oC

Time To Peak Temperature

Time At 260 ^oC

60 sec Min, 150 sec Max

480 sec Max

t _AMB-P

t _P

20 sec Min, 40 sec Max

6 ^oC/sec Max

Ramp Down

R _DN

t _L

t _P

260

R _UP

217

200

R _DN

150

t _S

t _AMB-P

Time (sec)

Vectron International 267 Lowell Rd. Hudson, NH 03051 Tel:1-88-VECTRON-1

e-mail vectron@vectron.com

1 234 5 6 7...10

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