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JANS1N4102DUR-1 PDF预览

JANS1N4102DUR-1

更新时间: 2024-11-30 22:51:43
品牌 Logo 应用领域
美高森美 - MICROSEMI 二极管齐纳二极管测试
页数 文件大小 规格书
2页 111K
描述
SILICON 400mA LOW NOISE ZENER DIODES

JANS1N4102DUR-1 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Active零件包装代码:DO-213AA
包装说明:O-LELF-R2针数:2
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8541.10.00.50风险等级:5.54
Is Samacsys:N其他特性:METALLURGICALLY BONDED
外壳连接:ISOLATED配置:SINGLE
二极管元件材料:SILICON二极管类型:ZENER DIODE
JEDEC-95代码:DO-213AAJESD-30 代码:O-LELF-R2
JESD-609代码:e0湿度敏感等级:1
元件数量:1端子数量:2
封装主体材料:GLASS封装形状:ROUND
封装形式:LONG FORM峰值回流温度(摄氏度):NOT SPECIFIED
极性:UNIDIRECTIONAL最大功率耗散:0.5 W
认证状态:Qualified参考标准:MIL-19500/435F
标称参考电压:8.7 V表面贴装:YES
技术:ZENER端子面层:Tin/Lead (Sn/Pb)
端子形式:WRAP AROUND端子位置:END
处于峰值回流温度下的最长时间:NOT SPECIFIED最大电压容差:1%
工作测试电流:0.25 mABase Number Matches:1

JANS1N4102DUR-1 数据手册

 浏览型号JANS1N4102DUR-1的Datasheet PDF文件第2页 
1N4099UR-1 THRU 1N4135UR-1 AVAILABLE IN JAN, JANTX, JANTXV AND  
1N4099UR-1  
thru  
JANS  
PER MIL-PRF-19500/435  
1N4135UR-1  
and  
• LEADLESS PACKAGE FOR SURFACE MOUNT  
CDLL4099 thru CDLL4135  
µ
• LOW CURRENT OPERATION AT 250 A  
• METALLURGICALLY BONDED  
• DOU-  
MAXIMUM RATINGS  
Junction and Storage Temperature: -65°C to +175°C  
DC Power Dissipation: 500mW @ T  
Power Derating: 10mW/ °C above T  
Forward Derating @ 200 mA: 1.1 Volts maximum  
= +125°C  
= +125°C  
EC  
EC  
ELECTRICAL CHARACTERISTICS @ 25°C, unless otherwise specified.  
CDI  
TYPE  
NOMINAL  
ZENER  
ZENER  
TEST  
MAXIMUM  
ZENER  
MAXIMUM REVERSE  
LEAKAGE  
MAXIMUM  
ZENER  
NUMBER  
VOLTAGE  
CURRENT  
IMPEDANCE  
CURRENT  
CURRENT  
V
@ l  
l
Z
l
@ V  
l
Z
ZT  
ZT  
ZT  
R
R
ZM  
(Note 1)  
VOLTS  
(Note 2)  
OHMS  
µ A  
µ A  
VOLTS  
mA  
CDLL4099  
CDLL4100  
CDLL4101  
6.8  
7.5  
8.2  
250  
250  
250  
200  
200  
200  
10  
10  
1.0  
5.17  
5.70  
6.24  
56  
51  
46  
MILLIMETERS  
INCHES  
CDLL4102  
CDLL4103  
CDLL4104  
8.7  
9.1  
10  
250  
250  
250  
200  
200  
200  
1.0  
1.0  
1.0  
6.61  
6.92  
7.60  
44  
42  
38  
DIM MIN MAX MIN MAX  
D
F
1.60  
0.41  
3.30  
1.70 0.063 0.067  
0.55 0.016 0.022  
3.70 .130 .146  
CDLL4105  
CDLL4106  
CDLL4107  
11  
12  
13  
250  
250  
250  
200  
200  
200  
.05  
8.44  
9.12  
9.87  
35  
32  
29  
.05  
.05  
G
CDLL4108  
CDLL4109  
CDLL4110  
14  
15  
16  
250  
250  
250  
200  
100  
100  
.05  
.05  
.05  
10.65  
11.40  
12.15  
27  
25  
24  
G1  
S
2.54 REF.  
0.03 MIN.  
.100 REF.  
.001 MIN.  
CDLL4111  
CDLL4112  
CDLL4113  
17  
18  
19  
250  
250  
250  
100  
100  
150  
.05  
.05  
.05  
12.92  
13.67  
14.44  
22  
21  
20  
CDLL4114  
CDLL4115  
CDLL4116  
20  
22  
24  
250  
250  
250  
150  
150  
150  
.01  
.01  
.01  
15.20  
16.72  
18.25  
19  
17  
16  
FIGURE 1  
DESIGN DATA  
CDLL4117  
CDLL4118  
CDLL4119  
25  
27  
28  
250  
250  
250  
150  
150  
200  
.01  
.01  
.01  
19.00  
20.46  
21.28  
15  
14  
14  
CASE: DO-213AA, Hermetically sealed  
glass case. (MELF, SOD-80, LL34)  
CDLL4120  
CDLL4121  
CDLL4122  
30  
33  
36  
250  
250  
250  
200  
200  
200  
.01  
.01  
.01  
22.80  
25.08  
27.38  
13  
12  
11  
CDLL4123  
CDLL4124  
CDLL4125  
39  
43  
47  
250  
250  
250  
200  
250  
250  
.01  
.01  
.01  
29.65  
32.65  
35.75  
9.8  
8.9  
8.1  
LEAD FINISH: Tin / Lead  
CDLL4126  
CDLL4127  
CDLL4128  
51  
56  
60  
250  
250  
250  
300  
300  
400  
.01  
.01  
.01  
38.76  
42.60  
45.60  
7.5  
6.7  
6.4  
THERMAL RESISTANCE: (R  
):  
OJEC  
100 °C/W maximum at L = 0 inch  
CDLL4129  
CDLL4130  
CDLL4131  
62  
68  
75  
250  
250  
250  
500  
700  
700  
.01  
.01  
.01  
47.10  
51.68  
57.00  
6.1  
5.6  
5.1  
THERMAL IMPEDANCE: (Z  
°C/W maximum  
): 35  
OJX  
CDLL4132  
CDLL4133  
CDLL4134  
CDLL4135  
82  
87  
250  
250  
250  
250  
800  
1000  
1200  
1500  
.01  
.01  
.01  
.01  
62.32  
66.12  
69.16  
76.00  
4.6  
4.4  
4.2  
3.8  
91  
POLARITY: Diode to be operated with  
the banded (cathode) end positive.  
100  
NOTE 1  
NOTE 2  
The CDI type numbers shown above have a Zener voltage tolerance of  
+ 5% of the nominal Zener voltage. Nominal Zener voltage is measured  
with the device junction in thermal equilibrium at an ambient temperature  
of 25°C + 3°C. A "C" suffix denotes a + 2% tolerance and a "D" suffix  
denotes a + 1% tolerance.  
MOUNTING SURFACE SELECTION:  
The Axial Coefficient of Expansion  
(COE) Of this Device is Approximately  
+6PPM/°C. The COE of the Mounting  
Surface System Should Be Selected To  
Provide A Suitable Match With This  
Device.  
Zener impedance is derived by superimposing on l , A 60 Hz rms a.c.  
ZT  
current equal to 10% of l  
(25 µ A a.c.).  
ZT  
6 LAKE STREET, LAWRENCE, MASSACHUSETTS 01841  
PHONE (978) 620-2600  
FAX (978) 689-0803  
WEBSITE: http://www.microsemi.com  
111  

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