ISL71090SEH25
Output Voltage Adjustment
Device Operation
The output voltage can be adjusted above and below the
factory-calibrated value via the trim terminal. The trim terminal is
the negative feedback divider point of the output op amp. The
positive input of the amplifier is about 1.216V, and in feedback,
so will be the trim voltage. The suggested method to adjust the
output is to connect a 1MΩ external resistor directly to the trim
terminal and connect the other end to the wiper of a
Bandgap Precision Reference
The ISL71090SEH25 uses a bandgap architecture and special
trimming circuitry to produce a temperature compensated,
precision voltage reference with high input voltage capability and
moderate output current drive.
potentiometer that has a 100kΩ resistance and whose outer
terminals connect to VOUT and ground. If a 1MΩ resistor is
connected to trim, the output adjust range will be ±6.3mV. The
TRIM pin should not have any capacitor tied to its output, also it
is important to minimize the capacitance on the trim terminal
during layout to preserve output amplifier stability. It is also best
to connect the series resistor directly to the trim terminal, to
minimize that capacitance and also to minimize noise injection.
Small trim adjustments will not disturb the factory-set
temperature coefficient of the reference, but trimming near the
extreme values can.
Applications Information
Board Mounting Considerations
For applications requiring the highest accuracy, board mounting
location should be reviewed. The device uses a ceramic flatpack
package. Generally, mild stresses to the die when the printed
circuit (PC) board is heated and cooled, can slightly change the
shape. Because of these die stresses, placing the device in areas
subject to slight twisting can cause degradation of reference
voltage accuracy. It is normally best to place the device near the
edge of a board, or on the shortest side, because the axis of
bending is most limited in that location. Mounting the device in a
cutout also minimizes flex. Obviously, mounting the device on
flexprint or extremely thin PC material will likewise cause loss of
reference accuracy.
Output Stage
The output stage of the device has a push pull configuration with
an high side PNP and a low side NPN. This helps the device to act
as a source and sink. The device can source 20mA and sink
10mA.
Board Assembly Considerations
Some PC board assembly precautions are necessary. Normal
output voltage shifts of typically 100µV can be expected with
Pb-free reflow profiles or wave solder on multi-layer FR4 PC
boards. Precautions should be taken to avoid excessive heat or
extended exposure to high reflow or wave solder temperatures.
Use of COMP Cap
The reference can be compensated for the COUT capacitors used
by adding a capacitor from COMP pin to GND. See Table 1 for
recommended values. of the COMP capacitor.
TABLE 1.
Noise Performance and Reduction
COUT
(µF)
CCOMP
(nF)
The output noise voltage over the 0.1Hz to 10Hz bandwidth is
typically 2µVP-P (VOUT = 2.5V). The noise measurement is made
with a 9.9Hz bandpass filter. Noise in the 10Hz to 1kHz
bandwidth is approximately 1.6µVRMS (VOUT = 2.5V), with 0.1µF
capacitance on the output. This noise measurement is made
with a band pass filter of 990Hz. Load capacitance up to 10µF
(with COMP) can be added but will result in only marginal
improvements in output noise and transient response.
0.1
1
1
1
10
10
SEE Testing
The device was tested under ion beam at an LET of
86MeV•cm2/mg. The device did not latch up or burn out to a
VDD of 36V and at +125°C. Single Event transients were
observed and are summarized in the Table 2:
Turn-On Time
Normal turn-on time is typically 150µs, the circuit designer must
take this into account when looking at power-up delays or
sequencing.
TABLE 2.
Temperature Coefficient
VIN
(V)
IOUT
(A)
COUT
(µF)
SET
(% VOUT
The limits stated for temperature coefficient (Tempco) are
governed by the method of measurement. The overwhelming
standard for specifying the temperature drift of a reference is to
measure the reference voltage at two temperatures which
provide for the maximum voltage deviation and take the total
variation, (VHIGH - VLOW), this is then divided by the temperature
extremes of measurement (THIGH – TLOW). The result is divided by
the nominal reference voltage (at T = +25°C) and multiplied by
106 to yield ppm/°C. This is the “Box” method for specifying
temperature coefficient.
)
4
5
5
5
1
1
-4.6
-4.4
-1.0
30
30
10
DNC Pins
These pins are for trimming purpose and for factory use only. Do
not connect these to the circuit in any way. It will adversely effect
the performance of the reference.
FN8451.0
June 6, 2013
7
5秒后页面跳转
平面型VDMOS与超结型VDMOS的雪崩耐量差异及选择指南
快速解读数据手册：HT7533引脚图说明、参数分析、技术特点
一文带你了解TMS320F28335引脚图说明、封装形式、参数详情
89C51单片机技术资料解析：参数详情、引脚说明
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
技术参数
数据手册
如果您发现信息不准确，
